# US 12,183,586 B2 · Method for forming semiconductor structure

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- Number: US 12,183,586 B2
- Document ID: US12183586B2
- Status: Granted
- Kind: B2
- Application number: 17/504,636
- Filed: 2021-10-19
- Published: 2022-08-04
- Granted: 2024-12-31
- Earliest claimed: 2021-01-29
- Assignees: Changxin Memory Technologies, Inc.
- Applicants: Changxin Memory Technologies, Inc.
- Inventors: Jun Xia; Kangshu Zhan; Sen Li; Penghui Xu; Qiang Wan; Tao Liu
- Web page: https://patentgrep.com/patent/US12183586B2

## CPC

- H10P 50/695: {characterised by the process involved to create the mask, e.g. lift-off masks or sidewalls or to modify the mask}
- H10B 12/00: Dynamic random access memory [DRAM] devices
- H10B 12/0387: {Making the trench}
- H10P 50/71: {using masks for conductive or resistive materials}
- H10P 50/73: {using masks for insulating materials}
- H10P 95/062: {involving a dielectric removal step}
- H10W 10/014: {using trench refilling with dielectric materials, e.g. shallow trench isolations}
- H10W 10/17: formed using trench refilling with dielectric materials, e.g. shallow trench isolations
- H10B 12/033: {the capacitor extending over the transistor}
- H10B 12/09: {with simultaneous manufacture of the peripheral circuit region and memory cells}
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10B: ELECTRONIC MEMORY DEVICES
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

An embodiment of the application provides a method for forming a semiconductor structure. The semiconductor structure includes a first region and a second region. The method includes the following steps: providing a base, an insulating layer, and a mask layer that are stacked in sequence, where the first region has at least one trench penetrating the mask layer and the insulating layer, and the mask layer has an upper surface in the second region higher than that in the first region; forming a first protection layer, where an upper surface and a sidewall of the mask layer in the first region are covered with the first protection layer; after the first protection layer is formed, removing the mask layer in the second region; subsequent to removal of the mask layer in the second region, removing the first protection layer; and removing the mask layer in the first region.

## Claims

### Claim 1

A method for forming a semiconductor structure, the semiconductor structure comprising a first region and a second region, the method comprising:
providing a base, an insulating layer, and a mask layer that are stacked in sequence, wherein the first region has at least one trench penetrating the mask layer and the insulating layer, and the mask layer has an upper surface in the second region higher than that in the first region;
forming a first protection layer, wherein the upper surface and a sidewall of the mask layer in the first region are covered with the first protection layer;
after forming the first protection layer, removing the mask layer in the second region;
after removing the mask layer in the second region, removing the first protection layer; and
removing the mask layer in the first region.

### Claim 2 (depends on 1)

The method of forming the semiconductor structure according to claim 1, wherein a method for forming the first protection layer comprises: forming the first protection layer at a bottom and on a sidewall of the trench.

### Claim 3 (depends on 2)

The method for forming the semiconductor structure according to claim 2, wherein a process step for removing the first protection layer and the mask layer in the first region comprises:
removing a part of the first protection layer to expose the mask layer in the first region;
after exposing the mask layer in the first region, removing the mask layer in the first region; and
after removing the mask layer in the first region, removing the remaining first protection layer.

### Claim 4 (depends on 2)

The method for forming the semiconductor structure according to claim 2, wherein a process step for removing the first protection layer and the mask layer in the first region comprises:
removing the entire first protection layer to expose the mask layer in the first region;
after exposing the mask layer in the first region, removing the mask layer in the first region.

### Claim 5 (depends on 3)

The method for forming the semiconductor structure according to claim 3, wherein subsequent to exposure of the mask layer in the first region and prior to removal of the mask layer in the first region, the method further comprises:
forming a second protection layer covering an upper surface of the insulating layer in the second region; and
after removing the mask layer in the first region, removing the second protection layer.

### Claim 6 (depends on 4)

The method for forming the semiconductor structure according to claim 4, wherein subsequent to exposure of the mask layer in the first region and prior to removal of the mask layer in the first region, the method further comprises:
forming a second protection layer covering an upper surface of the insulating layer in the second region; and
after removing the mask layer in the first region, removing the second protection layer.

### Claim 7 (depends on 1)

The method for forming the semiconductor structure according to claim 1, wherein a process step for forming the first protection layer comprises: forming the first protection layer covering the upper surface and the sidewall of the mask layer in the second region.

### Claim 8 (depends on 7)

The method for forming the semiconductor structure according to claim 7, wherein prior to removal of the mask layer in the second region, the method further comprises: removing the first protection layer on the upper surface of the mask layer in the second region.

### Claim 9 (depends on 1)

The method for forming the semiconductor structure according to claim 1, wherein the trench is filled up with the formed first protection layer, and the upper surface of the mask layer in the first region is covered with the first protection layer.

### Claim 10 (depends on 1)

The method for forming the semiconductor structure according to claim 1, wherein prior to formation of the first protection layer, the method further comprises: forming an initial protection layer, wherein the trench is filled up with the formed initial protection layer, and the upper surface of the mask layer in the second region is covered with the initial protection layer.

### Claim 11 (depends on 10)

The method for forming the semiconductor structure according to claim 10, wherein the process step for forming the first protection layer comprises: before removing the mask layer in the second region, removing the initial protection layer on the upper surface of the mask layer in the second region to expose the mask layer in the second region, wherein the remaining initial protection layer is taken as the first protection layer.

### Claim 12 (depends on 1)

The method for forming the semiconductor structure according to claim 1, wherein the formed first protection layer on the upper surface of the mask layer in the first region has a thickness of 100 nm to 200 nm.

### Claim 13 (depends on 1)

The method for forming a semiconductor structure according to claim 1, wherein a material of the first protective layer comprises a photoresist, and a material of the mask layer comprises polysilicon.

### Claim 14 (depends on 13)

The method for forming the semiconductor structure according to claim 13, wherein the first protection layer is removed with an oxygen-containing plasma.

### Claim 15 (depends on 13)

The method for forming the semiconductor structure according to claim 13, wherein the mask layer is removed with a hydrogen-containing plasma.

### Claim 16 (depends on 1)

The method for forming the semiconductor structure according to claim 1, wherein the process for removing the mask layer and the process for removing the first protective layer are performed in a same reaction chamber.