# US 12,183,538 B2 · Semiconductor manufacturing apparatus, semiconductor device and manufacturing method of semiconductor device

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- Number: US 12,183,538 B2
- Document ID: US12183538B2
- Status: Granted
- Kind: B2
- Application number: 17/653,562
- Filed: 2022-03-04
- Published: 2023-03-02
- Granted: 2024-12-31
- Earliest claimed: 2021-08-26
- Assignees: Kioxia Corporation
- Applicants: Kioxia Corporation
- Inventors: Takayuki Ito
- Web page: https://patentgrep.com/patent/US12183538B2

## CPC

- H01J 37/05: Electron or ion-optical arrangements for separating electrons or ions according to their energy {or mass}(particle separator tubes H01J49/00)
- H10D 30/601: {having lightly-doped drain or source extensions, e.g. LDD IGFETs or DDD IGFETs (lightly doped source or drain extensions for TFTs H10D30/6715)}
- H01J 37/1478: {Beam tilting means, i.e. for stereoscopy or for beam channelling}
- H01J 37/20: Means for supporting or positioning the object or the material; Means for adjusting diaphragms or lenses associated with the support
- H01J 37/3023: {Program control}
- H01J 37/3171: {for ion implantation}
- H10D 30/0227: {having both lightly-doped source and drain extensions and source and drain regions self-aligned to the sides of the gate, e.g. lightly-doped drain [LDD] MOSFET or double-diffused drain [DDD] MOSFET}
- H10D 30/605: {having significant overlap between the lightly-doped extensions and the gate electrode}
- H10D 62/151: {of IGFETs (of IGFETs having LDD or DDD structure H10D30/601; of thin film transistors H10D30/6713)}
- H10P 30/204: {into Group IV semiconductors}
- H10P 30/208: {of electrically inactive species}
- H10P 30/21: {of electrically active species}
- H10P 30/222: {characterised by the angle between the ion beam and the crystal planes or the main crystal surface (characterised by the angle between the ion beam and the mask H10P30/221)}
- H10P 30/28: characterised by an annealing step, e.g. for activation of dopants
- H01J 2237/0041: Neutralising arrangements
- H01J 2237/05: Arrangements for energy or mass analysis
- H01J 2237/20207: Tilt
- H01J 2237/20228: Mechanical X-Y scanning
- H01J 2237/20285: computer-controlled
- H01J: ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS (spark-gaps H01T; electric arc lamps H05B31/00; particle accelerators H05H)
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10

## Abstract

A semiconductor manufacturing apparatus according to the present embodiment includes a stage on which a wafer can be placed. A separator separates a beam of impurities to be introduced into the wafer into an ion component and a neutral component. A controller switches the semiconductor manufacturing apparatus between a first mode and a second mode, where in the first mode, the ion component is introduced into the wafer and in the second mode, the neutral component is introduced into the wafer.

## Claims

### Claim 1

A semiconductor manufacturing apparatus comprising:
a stage on which a wafer can be placed;
a separator configured to separate a beam of impurities to be introduced into the wafer into an ion component and a neutral component;
a controller configured to switch the semiconductor manufacturing apparatus between a first mode and a second mode, where the ion component being introduced into the wafer in the first mode and the neutral component being introduced into the wafer in the second mode; and
drivers configured to move the stage to a first location at which the ion component is introduced, and to a second location at which the neutral component is introduced.

### Claim 2 (depends on 1)

The apparatus of claim 1, wherein the drivers adjust an inclination of the stage such that the ion component is introduced from a direction inclined at a first angle from a direction perpendicular to a surface of the wafer, and adjust an inclination of the stage such that the neutral component is introduced from a direction inclined at a second angle from a direction perpendicular to the surface of the wafer.

### Claim 3 (depends on 2)

The apparatus of claim 2, wherein the controller causes the stage to move between the first location and the second location in synchronization with adjustment of the stage between the first angle and the second angle.

### Claim 4 (depends on 1)

The apparatus of claim 1, further comprising a chamber in which the wafer can be accommodated, wherein
the controller controls concentrations of the ion component and the neutral component by using a pressure in the chamber.

### Claim 5 (depends on 2)

The apparatus of claim 2, further comprising a chamber in which the wafer can be accommodated, wherein
the controller controls concentrations of the ion component and the neutral component by using a pressure in the chamber.

### Claim 6

A semiconductor manufacturing apparatus comprising:
a stage on which a wafer can be placed;
a separator configured to separate a beam of impurities to be introduced into the wafer into an ion component and a neutral component; and
a controller configured to switch the semiconductor manufacturing apparatus between a first mode and a second mode, where the ion component being introduced into the wafer in the first mode and the neutral component being introduced into the wafer in the second mode, wherein
the separator causes a difference in energy between the ion component and the neutral component, introduces the ion component into the wafer by using first energy, and introduces the neutral component into the wafer by using second energy.

### Claim 7 (depends on 1)

The apparatus of claim 1, wherein the separator causes a difference in energy between the ion component and the neutral component, introduces the ion component into the wafer by using first energy, and introduces the neutral component into the wafer by using second energy.

### Claim 8 (depends on 2)

The apparatus of claim 2, wherein the separator causes a difference in energy between the ion component and the neutral component, introduces the ion component into the wafer by using first energy, and introduces the neutral component into the wafer by using second energy.