# US 12,183,299 B2 · Display device > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,183,299 B2 - Document ID: US12183299B2 - Status: Granted - Kind: B2 - Application number: 18/524,077 - Filed: 2023-11-30 - Published: 2024-03-28 - Granted: 2024-12-31 - Earliest claimed: 2010-01-24 - Assignees: Semiconductor Energy Laboratory Co., Ltd. - Applicants: Semiconductor Energy Laboratory Co., Ltd. - Inventors: Shunpei Yamazaki - Web page: https://patentgrep.com/patent/US12183299B2 ## CPC - G09G 3/3648: {using an active matrix (G09G3/367 - G09G3/3696 take precedence)} - G02F 1/133753: {with different alignment orientations or pretilt angles on a same surface, e.g. for grey scale or improved viewing angle} - G02F 1/136213: {Storage capacitors associated with the pixel electrode} - G02F 1/13624: {having more than one switching element per pixel} - G02F 1/1368: in which the switching element is a three-electrode device {(G02F1/136277 takes precedence)} - H10D 86/423: {comprising semiconductor materials not belonging to the Group IV, e.g. InGaZnO} - H10D 86/60: wherein the TFTs are in active matrices - G02F 2202/10: semiconductor - G09G 2300/0809: Several active elements per pixel in active matrix panels - G09G 2310/08: Details of timing specific for flat panels, other than clock recovery - H10D 30/6755: {Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate} - H10D 62/405: {Orientations of crystalline planes} - H10K 50/12: comprising dopants - H10K 50/19: Tandem OLEDs - H10K 59/32: Stacked devices having two or more layers, each emitting at different wavelengths - G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00) - G02F: OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS - H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES - H10K: ORGANIC ELECTRIC SOLID-STATE DEVICES ## Abstract A display panel for displaying an image is provided with a plurality of pixels arranged in a matrix. Each pixel includes one or more units each including a plurality of subunits. Each subunit includes a transistor in which an oxide semiconductor layer which is provided so as to overlap a gate electrode with a gate insulating layer interposed therebetween, a pixel electrode which drives liquid crystal connected to a source or a drain of the transistor, a counter electrode which is provided so as to face the pixel electrode, and a liquid crystal layer provided between the pixel electrode and the counter electrode. In the display panel, a transistor whose off current is lower than 10 zA/μm at room temperature per micrometer of the channel width and off current of the transistor at 85° C. can be lower than 100 zA/μm per micrometer in the channel width. ## Claims ### Claim 1 A semiconductor device comprising: a transistor comprising an oxide semiconductor layer comprising a channel formation region, a capacitor electrically connected to the transistor, wherein the transistor is configured to hold a voltage applied to the capacitor, wherein a frequency of applying a voltage to the capacitor through the transistor in a first period is lower than a frequency of applying a voltage to the capacitor through the transistor in a second period, and wherein the channel formation region of the transistor comprises a c-axis aligned crystalline region. ### Claim 2 (depends on 1) The semiconductor device according to claim 1, wherein the oxide semiconductor layer comprises indium, gallium, and zinc. ### Claim 3 (depends on 1) The semiconductor device according to claim 1, wherein an off current per micrometer of a channel width of the transistor is less than 10 zA/μm at room temperature. ### Claim 4 (depends on 1) The semiconductor device according to claim 1, wherein an off current per micrometer of a channel width of the transistor is less than 100 zA/μm at 85° C. ### Claim 5 (depends on 1) The semiconductor device according to claim 1, wherein the semiconductor device comprises a liquid crystal element and an organic electroluminescence element. ### Claim 6 (depends on 1) The semiconductor device according to claim 1, wherein the semiconductor device is a display device comprising a pixel portion, and wherein the pixel portion comprises the transistor and the capacitor. ### Claim 7 A semiconductor device comprising: a transistor comprising an oxide semiconductor layer comprising a channel formation region, a capacitor electrically connected to the transistor, wherein the transistor is configured to hold a voltage applied to the capacitor, wherein a frequency of applying a voltage to the capacitor through the transistor in a first period is lower than a frequency of applying a voltage to the capacitor through the transistor in a second period, wherein the channel formation region of the transistor comprises a crystalline region, and wherein a c-axis of the crystalline region is aligned in a direction perpendicular to a surface of the oxide semiconductor layer. ### Claim 8 (depends on 7) The semiconductor device according to claim 7, wherein the oxide semiconductor layer comprises indium, gallium, and zinc. ### Claim 9 (depends on 7) The semiconductor device according to claim 7, wherein an off current per micrometer of a channel width of the transistor is less than 10 zA/μm at room temperature. ### Claim 10 (depends on 7) The semiconductor device according to claim 7, wherein an off current per micrometer of a channel width of the transistor is less than 100 zA/μm at 85° C. ### Claim 11 (depends on 7) The semiconductor device according to claim 7, wherein the semiconductor device comprises a liquid crystal element and an organic electroluminescence element. ### Claim 12 (depends on 7) The semiconductor device according to claim 7, wherein the semiconductor device is a display device comprising a pixel portion, and wherein the pixel portion comprises the transistor and the capacitor. ### Claim 13 A semiconductor device comprising: a transistor comprising an oxide semiconductor layer comprising a channel formation region, a capacitor electrically connected to the transistor, wherein the transistor is configured to hold a voltage applied to the capacitor, wherein a frequency of applying a voltage to the capacitor through the transistor in a first period is lower than a frequency of applying a voltage to the capacitor through the transistor in a second period, wherein the channel formation region of the transistor comprises a crystalline region, wherein the crystalline region is a non-single-crystal region, and wherein a c-axis of the crystalline region is aligned in a direction perpendicular to a surface of the oxide semiconductor layer. ### Claim 14 (depends on 13) The semiconductor device according to claim 13, wherein the oxide semiconductor layer comprises indium, gallium, and zinc. ### Claim 15 (depends on 13) The semiconductor device according to claim 13, wherein an off current per micrometer of a channel width of the transistor is less than 10 zA/μm at room temperature. ### Claim 16 (depends on 13) The semiconductor device according to claim 13, wherein an off current per micrometer of a channel width of the transistor is less than 100 zA/μm at 85° C. ### Claim 17 (depends on 13) The semiconductor device according to claim 13, wherein the semiconductor device comprises a liquid crystal element and an organic electroluminescence element. ### Claim 18 (depends on 13) The semiconductor device according to claim 13, wherein the semiconductor device is a display device comprising a pixel portion, and wherein the pixel portion comprises the transistor and the capacitor.