# US 12,183,295 B2 · Goa circuit and display panel configured to maintain normal signal stage transmission during display period and reduce charge leafkage during touch period > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,183,295 B2 - Document ID: US12183295B2 - Status: Granted - Kind: B2 - Application number: 18/228,045 - Filed: 2023-07-31 - Published: 2024-11-21 - Granted: 2024-12-31 - Earliest claimed: 2023-05-15 - Assignees: Guangzhou China Star Optoelectronics Semiconductor Display Technology Co., LTd. - Applicants: Guangzhou China Star Optoelectronics Semiconductor Display Technology Co., LTD. - Inventors: Minghu Deng; Xinru Yao - Web page: https://patentgrep.com/patent/US12183295B2 ## CPC - G09G 3/36: using liquid crystals - G09G 3/20: for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix {no fixed position being assigned to or needed to be assigned to the individual characters or partial characters} - G09G 3/3677: {suitable for active matrices only} - G09G 2310/0286: Details of a shift registers arranged for use in a driving circuit - G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00) ## Abstract A gate driver on array (GOA) circuit includes a plurality of GOA units in cascade. Each of the GOA units includes a pull-up control module, a pull-up module, a capacitor module, pull-down maintenance module, a pull-down module, and a GOA drive shutdown module. The pull-up control module is connected to a signal output terminal G(N−3) of a (N−3) stage GOA unit, a constant-voltage high-potential signal terminal, and a first node, wherein N is a natural number. The gate shutdown signal terminal is configured to provide a low potential signal during a display period and is configured to provide a high potential signal during a touch period, when the gate shutdown signal terminal provides the low potential signal, the pull-down maintenance module maintains a pull-down maintenance function, and when the gate shutdown signal terminal provides the high potential signal, the pull-down maintenance module becomes is disabled. ## Claims ### Claim 1 A gate driver on array (GOA) circuit, comprising: a plurality of GOA units in cascade, wherein each of the GOA units comprises a pull-up control module, a pull-up module, a capacitor module, pull-down maintenance module, a pull-down module, and a GOA drive shutdown module; wherein the pull-up control module is connected to a signal output terminal G(N−3) of a (N−3) stage GOA unit, a constant-voltage high-potential signal terminal, and a first node, wherein N is a natural number; wherein the pull-up module is connected to a clock signal line, the first node, and a second node; wherein the capacitor module is connected to the first node and the second node; wherein the pull-down maintenance module is connected to the constant-voltage high-potential signal terminal, the first node, the second node, a third node, and a fourth node, wherein the third node is connected to a gate shutdown signal terminal, and the fourth node is connected to a constant-voltage negative-potential signal terminal; wherein the pull-down module is connected to a signal output terminal G(N+4) of a (N+4)th stage GOA unit, the first node, and the third node; wherein the GOA drive shutdown module is connected to a gate shutdown signal terminal, the second node, and the fourth node; wherein the gate shutdown signal terminal is configured to provide a low potential signal during a display period and is configured to provide a high potential signal during a touch period, when the gate shutdown signal terminal provides the low potential signal, the pull-down maintenance module maintains a pull-down maintenance function, and when the gate shutdown signal terminal provides the high potential signal, the pull-down maintenance module becomes disabled; wherein in the display period, a periodic clock signal and an output signal of a previous stage are configured to control the pull-up control module to charge a capacitor of the first node, the periodic clock signal and a voltage of the first node are configured to control opening or closing of the pull-up module, when the periodic clock signal becomes high potential, an output signal terminal G(N) of a Nth stage GOA unit is synchronously made to be high potential, and the pull-down maintenance module is configured to maintain the output signal terminal G(N) of the Nth stage GOA unit at a low potential. ### Claim 2 (depends on 1) The GOA circuit according to claim 1, wherein the pull-up control module comprises an eleventh thin film transistor, a first terminal of the eleventh thin film transistor is connected to the signal output terminal G(N−3) of the (N−3)th stage GOA unit, a second terminal of the eleventh thin film transistor is connected to the constant-voltage high-potential signal terminal, and a third terminal of the eleventh thin film transistor is connected to the first node. ### Claim 3 (depends on 2) The GOA circuit according to claim 2, wherein the pull-up module comprises a twenty-first thin film transistor, a first terminal of the twenty-first thin film transistor is connected to the first node, a second terminal of the twenty-first thin film transistor is connected to the clock signal line, and a third terminal of the twenty-first thin film transistor is connected to the second node. ### Claim 4 (depends on 3) The GOA circuit according to claim 3, wherein the pull-down module comprises a forty-first thin film transistor, a first terminal of the forty-first thin film transistor is connected to the signal output terminal G(N+4) of the (N+4)th stage GOA unit, a second terminal of the forty-first thin film transistor is connected to the first node, and a third terminal of the forty-first thin film transistor is connected to the third node. ### Claim 5 (depends on 4) The GOA circuit according to claim 4, wherein the pull-down maintenance module comprises a fifty-first thin film transistor, a fifty-second thin film transistor, a fifty-third thin film transistor, a fifty-fourth thin film transistor, a fifty-fifth thin film transistor, a fifty-sixth thin film transistor, and a forty-second thin film transistor; wherein a first terminal and a second terminal of the fifty-first thin film transistor are connected to the constant-voltage high-potential signal terminal, and a second terminal of the fifty-first thin film transistor is connected to a fifth node; wherein a first terminal of the fifty-second thin film transistor is connected to the first node, a second terminal of the fifty-second thin film transistor is connected to the fifth node, and a third terminal of the fifty-second thin film transistor is connected to the fourth node; wherein a first terminal of the fifty-third thin film transistor is connected to the fifth node, a second terminal of the fifty-third thin film transistor is connected to the constant-voltage high-potential signal terminal, and a third terminal of the fifty-third thin film transistor is connected to a sixth node; wherein a first terminal of the fifty-fourth thin film transistor is connected to the first node, a second terminal of the fifty-fourth thin film transistor is connected to the sixth node, and a third terminal of the fifty-fourth thin film transistor is connected to the fourth node; wherein a first terminal of the fifty-fifth thin film transistor is connected to the third node, a second terminal of the fifty-fifth thin film transistor is connected to the fifth node, and a third terminal of the fifty-fifth thin film transistor is connected to the fourth node; wherein a first terminal of the fifty-sixth thin film transistor is connected to the third node, a second terminal of the fifty-sixth thin film transistor is connected to the sixth node, and a third terminal of the fifty-sixth thin film transistor is connected to the fourth node; wherein a first terminal of the forty-second thin film transistor is connected to the sixth node, a second terminal of the forty-second thin film transistor is connected to the first node, and a third terminal of the forty-second thin film transistor is connected to the third node. ### Claim 6 (depends on 5) The GOA circuit according to claim 5, wherein the pull-down maintenance module further comprises a thirty-second thin film transistor, a first terminal of the thirty-second thin film transistor is connected to the sixth node, a second terminal of the thirty-second thin film transistor is connected to the second node, and a third terminal of the thirty-second thin film transistor is connected to the fourth node. ### Claim 7 (depends on 6) The GOA circuit according to claim 6, wherein the GOA drive shutdown module comprises a drive shutdown thin film transistor, a first terminal of the drive shutdown thin film transistor is connected to the gate shutdown signal terminal, a second terminal of the drive shutdown thin film transistor is connected to the second node, and a third terminal of the drive shutdown thin film transistor is connected to the fourth node. ### Claim 8 (depends on 1) The GOA circuit according to claim 1, wherein the GOA circuit further comprises a first reset thin film transistor, a first terminal of the first reset thin film transistor is connected to a reset signal terminal, a second terminal of the first reset thin film transistor is connected to the first node, and a third terminal of the first reset thin film transistor is connected to the fourth node. ### Claim 9 (depends on 1) The GOA circuit according to claim 1, wherein the GOA circuit further comprises a second reset thin film transistor, a first terminal of the second reset thin film transistor is connected to a reset signal terminal, a second terminal of the second reset thin film transistor is connected to the second node, and a third terminal of the second reset thin film transistor is connected to the fourth node. ### Claim 10 A display panel, comprising: a plurality of rows of sub-pixels; and a GOA circuit electrically connected to the plurality of rows of sub-pixels and configured to drive the plurality of rows of sub-pixels to emit light; wherein the GOA circuit comprises a plurality of GOA units in cascade, each of the GOA units comprises a pull-up control module, a pull-up module, a capacitor module, a pull-down maintenance module, a pull-down module, and a GOA drive shutdown module; wherein the pull-up control module is connected to a signal output terminal G(N−3) of a (N−3) stage GOA unit, a constant-voltage high-potential signal terminal, and a first node, wherein N is a natural number; wherein the pull-up module is connected to a clock signal line, the first node, and a second node; wherein the capacitor module is connected to the first node and the second node; wherein the pull-down maintenance module is connected to the constant-voltage high-potential signal terminal, the first node, the second node, a third node, and a fourth node, wherein the third node is connected to a gate shutdown signal terminal, and the fourth node is connected to a constant-voltage negative-potential signal terminal; wherein the pull-down module is connected to a signal output terminal G(N+4) of a (N+4)th stage GOA unit, the first node, and the third node; wherein the GOA drive shutdown module is connected to a gate shutdown signal terminal, the second node, and the fourth node; wherein the gate shutdown signal terminal is configured to provide a low potential signal during a display period and is configured to provide a high potential signal during a touch period, when the gate shutdown signal terminal provides the low potential signal, the pull-down maintenance module maintains a pull-down maintenance function, and when the gate shutdown signal terminal provides the high potential signal, the pull-down maintenance module becomes disabled; wherein in the display period, a periodic clock signal and an output signal of a previous stage are configured to control the pull-up control module to charge a capacitor of the first node, the periodic clock signal and a voltage of the first node are configured to control opening or closing of the pull-up module, when the periodic clock signal becomes high potential, an output signal terminal G(N) of a Nth stage GOA unit is synchronously made to be high potential, and the pull-down maintenance module is configured to maintain the output signal terminal G(N) of the Nth stage GOA unit at a low potential. ### Claim 11 (depends on 10) The display panel according to claim 10, wherein the pull-up control module comprises an eleventh thin film transistor, a first terminal of the eleventh thin film transistor is connected to the signal output terminal G(N−3) of the (N−3)th stage GOA unit, a second terminal of the eleventh thin film transistor is connected to the constant-voltage high-potential signal terminal, and a third terminal of the eleventh thin film transistor is connected to the first node. ### Claim 12 (depends on 11) The display panel according to claim 11, wherein the pull-up module comprises a twenty-first thin film transistor, a first terminal of the twenty-first thin film transistor is connected to the first node, a second terminal of the twenty-first thin film transistor is connected to the clock signal line, and a third terminal of the twenty-first thin film transistor is connected to the second node. ### Claim 13 (depends on 12) The display panel according to claim 12, wherein the pull-down module comprises a forty-first thin film transistor, a first terminal of the forty-first thin film transistor is connected to the signal output terminal G(N+4) of the (N+4)th stage GOA unit, a second terminal of the forty-first thin film transistor is connected to the first node, and a third terminal of the forty-first thin film transistor is connected to the third node. ### Claim 14 (depends on 13) The display panel according to claim 13, wherein the pull-down maintenance module comprises a fifty-first thin film transistor, a fifty-second thin film transistor, a fifty-third thin film transistor, a fifty-fourth thin film transistor, a fifty-fifth thin film transistor, a fifty-sixth thin film transistor, and a forty-second thin film transistor; wherein a first terminal and a second terminal of the fifty-first thin film transistor are connected to the constant-voltage high-potential signal terminal, and a second terminal of the fifty-first thin film transistor is connected to a fifth node; wherein a first terminal of the fifty-second thin film transistor is connected to the first node, a second terminal of the fifty-second thin film transistor is connected to the fifth node, and a third terminal of the fifty-second thin film transistor is connected to the fourth node; wherein a first terminal of the fifty-third thin film transistor is connected to the fifth node, a second terminal of the fifty-third thin film transistor is connected to the constant-voltage high-potential signal terminal, and a third terminal of the fifty-third thin film transistor is connected to a sixth node; wherein a first terminal of the fifty-fourth thin film transistor is connected to the first node, a second terminal of the fifty-fourth thin film transistor is connected to the sixth node, and a third terminal of the fifty-fourth thin film transistor is connected to the fourth node; wherein a first terminal of the fifty-fifth thin film transistor is connected to the third node, a second terminal of the fifty-fifth thin film transistor is connected to the fifth node, and a third terminal of the fifty-fifth thin film transistor is connected to the fourth node; wherein a first terminal of the fifty-sixth thin film transistor is connected to the third node, a second terminal of the fifty-sixth thin film transistor is connected to the sixth node, and a third terminal of the fifty-sixth thin film transistor is connected to the fourth node; wherein a first terminal of the forty-second thin film transistor is connected to the sixth node, a second terminal of the forty-second thin film transistor is connected to the first node, and a third terminal of the forty-second thin film transistor is connected to the third node. ### Claim 15 (depends on 14) The display panel according to claim 14, wherein the pull-down maintenance module further comprises a thirty-second thin film transistor, a first terminal of the thirty-second thin film transistor is connected to the sixth node, a second terminal of the thirty-second thin film transistor is connected to the second node, and a third terminal of the thirty-second thin film transistor is connected to the fourth node. ### Claim 16 (depends on 15) The display panel according to claim 15, wherein the GOA drive shutdown module comprises a drive shutdown thin film transistor, a first terminal of the drive shutdown thin film transistor is connected to the gate shutdown signal terminal, a second terminal of the drive shutdown thin film transistor is connected to the second node, and a third terminal of the drive shutdown thin film transistor is connected to the fourth node. ### Claim 17 (depends on 10) The display panel according to claim 10, wherein the GOA circuit further comprises a first reset thin film transistor, a first terminal of the first reset thin film transistor is connected to a reset signal terminal, a second terminal of the first reset thin film transistor is connected to the first node, and a third terminal of the first reset thin film transistor is connected to the fourth node. ### Claim 18 (depends on 10) The display panel according to claim 10, wherein the GOA circuit further comprises a second reset thin film transistor, a first terminal of the second reset thin film transistor is connected to a reset signal terminal, a second terminal of the second reset thin film transistor is connected to the second node, and a third terminal of the second reset thin film transistor is connected to the fourth node. ### Claim 19 (depends on 10) The display panel according to claim 10, wherein a timing of the GOA circuit comprises a time-division multiplexing timing configured to divide one frame time into a plurality of display periods and touch periods. ### Claim 20 (depends on 10) The display panel according to claim 10, wherein the GOA circuit is driven by a touch and display driver integration (TDDI).