# US 12,183,282 B2 · Pixel driving circuit of a display panel, method for driving a display panel, and display device

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- Number: US 12,183,282 B2
- Document ID: US12183282B2
- Status: Granted
- Kind: B2
- Application number: 18/091,333
- Filed: 2022-12-29
- Published: 2023-11-30
- Granted: 2024-12-31
- Earliest claimed: 2022-05-30
- Assignees: Hkc Corporation Limited
- Applicants: Hkc Corporation Limited
- Inventors: Xiufeng Zhou; Xin Yuan; Haijiang Yuan
- Web page: https://patentgrep.com/patent/US12183282B2

## CPC

- G09G 3/3233: with pixel circuitry controlling the current through the light-emitting element
- G09G 2300/0452: Details of colour pixel setup, e.g. pixel composed of a red, a blue and two green components
- G09G 2300/0814: used for selection purposes, e.g. logical AND for partial update
- G09G 2300/0842: forming a memory circuit, e.g. a dynamic memory with one capacitor
- G09G 2310/0262: The addressing of the pixel, in a display other than an active matrix LCD, involving the control of two or more scan electrodes or two or more data electrodes, e.g. pixel voltage dependent on signals of two data electrodes
- G09G 2310/0297: Special arrangements with multiplexing or demultiplexing of display data in the drivers for data electrodes, in a pre-processing circuitry delivering display data to said drivers or in the matrix panel, e.g. multiplexing plural data signals to one D/A converter or demultiplexing the D/A converter output to multiple columns
- G09G 2310/08: Details of timing specific for flat panels, other than clock recovery
- G09G 2320/0626: for control of overall brightness
- Y02D 10/00: Energy efficient computing, e.g. low power processors, power management or thermal management
- G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00)
- Y02D: CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE

## Abstract

A pixel driving circuit, a method for driving a display panel, and a display device are provided. The display panel includes pixel columns, each of the pixel columns includes pixel components. The pixel driving circuit includes pixel driving modules, a data line, first gating units, and second gating units. Each of the pixel driving modules is coupled to pixel components of adjacent two pixel columns of the pixel columns, any pixel component in each of the pixel columns is written in a driving voltage via a corresponding driving switch. A terminal of each of the first gating units and a terminal of each of the second gating units are respectively coupled to the data line, another terminal of each of the first gating units is coupled to a corresponding adjacent pixel component, another terminal of each of the second gating units is coupled to another corresponding adjacent pixel component.

## Claims

### Claim 1

A pixel driving circuit of a display panel, the display panel comprising a plurality of pixel columns, and each of the pixel columns comprising a plurality of pixel components, wherein the pixel driving circuit comprises: a plurality of pixel driving modules; wherein each of the pixel driving modules is coupled to pixel components of adjacent two pixel columns of the pixel columns, any pixel component in each of the pixel columns is written in a driving voltage via a corresponding driving switch;
wherein each of the pixel driving modules comprises:
a data line;
a plurality of first gating units, wherein a terminal of each of the first gating units is coupled to the data line, another terminal of each of the first gating units is coupled to a corresponding adjacent pixel component, each of the first gating units is configured to write a first data signal in a control terminal of a driving switch corresponding to the corresponding adjacent pixel component during a first duration, and write a second data signal in the control terminal of the driving switch corresponding to the corresponding adjacent pixel component during a second duration;
a plurality of second gating units, wherein a terminal of each of the second gating units is coupled to the data line, another terminal of each of the second gating units is coupled to another corresponding adjacent pixel component, each of the second gating units is configured to write the second data signal in a control terminal of another driving switch corresponding to the another corresponding pixel component during the second duration;
wherein the pixel driving circuit further comprises a plurality of first scanning control lines, and each of the first gating units comprises:
a first switch, wherein a control terminal of the first switch is coupled to a corresponding first scanning control line, an input terminal of the first switch is coupled to the data line, and an output terminal of the first switch is coupled to the control terminal of the driving switch; and
a second switch, coupled to the first switch, wherein a control terminal of the second switch is coupled to the corresponding first scanning control line, an input terminal of the second switch is coupled to the output terminal of the first switch, an output terminal of the second switch is coupled to the control terminal of the driving switch;
wherein the pixel driving circuit further comprises a plurality of second scanning control lines, and each of the second gating units comprises:
a third switch, wherein a control terminal of the third switch is coupled to the corresponding first scanning control line, an input terminal of the third switch is coupled to the data line; and
a gating switch, wherein a control terminal of the gating switch is coupled to a corresponding second scanning control line different from the first scanning control line, an input terminal of the gating switch is coupled to an output terminal of the third switch, and an output terminal of the gating switch is coupled to the control terminal of the another driving switch;
wherein for an upper pixel component and a lower pixel component adjacent to the upper pixel component and lower than the upper pixel component in a same one of the pixel columns, the control terminal of the gating switch of the lower pixel component is coupled to the control terminal of the third switch of the upper pixel component;
wherein for one of the plurality of first scanning control lines and one of the plurality of second scanning control lines which are configured to control two pixel components of the adjacent two pixel columns arranged in a same row, an end time of an enable period of the first scanning control line is later than a start time of an enable period of the second scanning control line and earlier than an end time of the enable period of the second scanning control line, the enable period of the first scanning control line and the enable period of the second scanning control line have a partially overlapped duration, and the start time of the enable period of the second scanning control line is later than a start time of the enable period of the first scanning control line.

### Claim 2 (depends on 1)

The pixel driving circuit as claimed in claim 1, wherein each of the first gating units or the second gating units comprises:
a capacitor, wherein a terminal of the capacitor is coupled to the control terminal of the corresponding driving switch, another terminal of the capacitor is coupled between a corresponding pixel component and an output terminal of the corresponding driving switch.

### Claim 3 (depends on 1)

The pixel driving circuit as claimed in claim 1, wherein for the upper pixel component and the lower pixel component adjacent to the upper pixel component and lower than the upper pixel component in a same one of the pixel columns, the control terminal of the first switch or the control terminal of the second switch of the lower pixel component is coupled to the control terminal of the third switch of the upper pixel component.

### Claim 4 (depends on 1)

The pixel driving circuit as claimed in claim 1, wherein each of the pixel driving modules further comprises a diode, a positive electrode of the diode is coupled to an output end of a corresponding driving switch, and a negative electrode of the diode is coupled to a corresponding pixel component.

### Claim 5

A method for driving a display panel, the display panel comprising a plurality of pixel columns, each of the pixel columns comprising a plurality of pixel components, a pixel driving circuit comprising a plurality of pixel driving modules, any pixel component in each of the pixel columns being written in a driving voltage via a corresponding driving switch; wherein the method comprises:
for a pixel component of each of the pixel columns, writing a first data signal in a control terminal of a driving switch corresponding to the pixel component during a first duration;
for another adjacent pixel component arranged in a same row as the pixel component and in another adjacent pixel column, writing a second data signal in a control terminal of another driving switch corresponding to the another adjacent pixel component during a second duration;
wherein each of the pixel driving modules comprises:
a data line;
a plurality of first gating units, wherein a terminal of each of the first gating units is coupled to the data line, another terminal of each of the first gating units is coupled to a corresponding adjacent pixel component, each of the first gating units is configured to write the first data signal in the control terminal of the driving switch corresponding to the corresponding adjacent pixel component during the first duration, and write the second data signal in the control terminal of the driving switch corresponding to the corresponding adjacent pixel component during the second duration; and
a plurality of second gating units, wherein a terminal of each of the second gating units is coupled to the data line, another terminal of each of the second gating units is coupled to another corresponding adjacent pixel component, each of the second gating units is configured to write the second data signal in a control terminal of another driving switch corresponding to the another corresponding pixel component during the second duration;
wherein the pixel driving circuit further comprises a plurality of first scanning control lines, and each of the first gating units comprises:
a first switch, wherein a control terminal of the first switch is coupled to a corresponding first scanning control line, an input terminal of the first switch is coupled to the data line, and an output terminal of the first switch is coupled to the control terminal of the driving switch; and
a second switch, coupled to the first switch, wherein a control terminal of the second switch is coupled to the corresponding first scanning control line, an input terminal of the second switch is coupled to the output terminal of the first switch, an output terminal of the second switch is coupled to the control terminal of the driving switch;
wherein the pixel driving circuit further comprises a plurality of second scanning control lines, and each of the second gating units comprises:
a third switch, wherein a control terminal of the third switch is coupled to the corresponding first scanning control line, an input terminal of the third switch is coupled to the data line; and
a gating switch, wherein a control terminal of the gating switch is coupled to a corresponding second scanning control line different from the first scanning control line, an input terminal of the gating switch is coupled to an output terminal of the third switch, and an output terminal of the gating switch is coupled to the control terminal of the another driving switch;
wherein for an upper pixel component and a lower pixel component adjacent to the upper pixel component and lower than the upper pixel component in a same one of the pixel columns, the control terminal of the gating switch of the lower pixel component is coupled to the control terminal of the third switch of the upper pixel component;
wherein for one of the plurality of first scanning control lines and one of the plurality of second scanning control lines which are configured to control two pixel components of the adjacent two pixel columns arranged in a same row, an end time of an enable period of the first scanning control line is later than a start time of an enable period of the second scanning control line and earlier than an end time of the enable period of the second scanning control line, the enable period of the first scanning control line and the enable period of the second scanning control line have a partially overlapped duration, and the start time of the enable period of the second scanning control line is later than a start time of the enable period of the first scanning control line.

### Claim 6

A display device, comprising a pixel driving circuit and a display panel, the display panel comprising a plurality of pixel columns, and each of the pixel columns comprising a plurality of pixel components, wherein the pixel driving circuit comprises: a plurality of pixel driving modules; wherein each of the pixel driving modules is coupled to pixel components of adjacent two pixel columns of the pixel columns, any pixel component in each of the pixel columns is written in a driving voltage via a corresponding driving switch;
wherein each of the pixel driving modules comprises:
a data line;
a plurality of first gating units, wherein a terminal of each of the first gating units is coupled to the data line, another terminal of each of the first gating units is coupled to a corresponding adjacent pixel component, each of the first gating units is configured to write a first data signal in a control terminal of a driving switch corresponding to the corresponding adjacent pixel component during a first duration, and write a second data signal in the control terminal of the driving switch corresponding to the corresponding adjacent pixel component during a second duration;
a plurality of second gating units, wherein a terminal of each of the second gating units is coupled to the data line, another terminal of each of the second gating units is coupled to another corresponding adjacent pixel component, each of the second gating units is configured to write the second data signal in a control terminal of another driving switch corresponding to the another corresponding pixel component during the second duration;
wherein the pixel driving circuit further comprises a plurality of first scanning control lines, and each of the first gating units comprises:
a first switch, wherein a control terminal of the first switch is coupled to a corresponding first scanning control line, an input terminal of the first switch is coupled to the data line, and an output terminal of the first switch is coupled to the control terminal of the driving switch; and
a second switch, coupled to the first switch, wherein a control terminal of the second switch is coupled to the corresponding first scanning control line, an input terminal of the second switch is coupled to the output terminal of the first switch, an output terminal of the second switch is coupled to the control terminal of the driving switch;
wherein the pixel driving circuit further comprises a plurality of second scanning control lines, and each of the second gating units comprises:
a third switch, wherein a control terminal of the third switch is coupled to the corresponding first scanning control line, an input terminal of the third switch is coupled to the data line; and
a gating switch, wherein a control terminal of the gating switch is coupled to a corresponding second scanning control line different from the first scanning control line, an input terminal of the gating switch is coupled to an output terminal of the third switch, and an output terminal of the gating switch is coupled to the control terminal of the another driving switch;
wherein for an upper pixel component and a lower pixel component adjacent to the upper pixel component and lower than the upper pixel component in a same one of the pixel columns, the control terminal of the gating switch of the lower pixel component is coupled to the control terminal of the third switch of the upper pixel component;
wherein for one of the plurality of first scanning control lines and one of the plurality of second scanning control lines which are configured to control two pixel components of the adjacent two pixel columns arranged in a same row, an end time of an enable period of the first scanning control line is later than a start time of an enable period of the second scanning control line and earlier than an end time of the enable period of the second scanning control line, the enable period of the first scanning control line and the enable period of the second scanning control line have a partially overlapped duration, and the start time of the enable period of the second scanning control line is later than a start time of the enable period of the first scanning control line.

### Claim 7 (depends on 6)

The display device as claimed in claim 6, wherein each of the first gating units or the second gating units comprises:
a capacitor, wherein a terminal of the capacitor is coupled to the control terminal of the corresponding driving switch, another terminal of the capacitor is coupled between a corresponding pixel component and an output terminal of the corresponding driving switch.

### Claim 8 (depends on 6)

The display device as claimed in claim 6, wherein for the upper pixel component and the lower pixel component adjacent to the upper pixel component and lower than the upper pixel component in a same one of the pixel columns, the control terminal of the first switch or the control terminal of the second switch of the lower pixel component is coupled to the control terminal of the third switch of the upper pixel component.

### Claim 9 (depends on 6)

The display device as claimed in claim 6, wherein each of the pixel driving modules further comprises a diode, a positive electrode of the diode is coupled to an output end of a corresponding driving switch, and a negative electrode of the diode is coupled to a corresponding pixel component.