# US 12,183,279 B2 · Pixel driving circuit and display panel

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- Number: US 12,183,279 B2
- Document ID: US12183279B2
- Status: Granted
- Kind: B2
- Application number: 17/790,062
- Filed: 2022-06-27
- Published: 2024-06-06
- Granted: 2024-12-31
- Earliest claimed: 2022-05-31
- Assignees: Tcl China Star Optoelectronics Technology Co., Ltd.
- Applicants: Tcl China Star Optoelectronics Technology Co., Ltd.
- Inventors: Liang Hu
- Web page: https://patentgrep.com/patent/US12183279B2

## CPC

- G09G 3/3233: with pixel circuitry controlling the current through the light-emitting element
- G09G 2300/0852: being a dynamic memory with more than one capacitor
- G09G 2300/0861: with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes
- G09G 2310/08: Details of timing specific for flat panels, other than clock recovery
- G09G 2320/0233: Improving the luminance or brightness uniformity across the screen
- G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00)

## Abstract

The present disclosure provides a pixel driving circuit and a display panel, including a data transistor connected to a data line, a driving transistor connected in series with a light emitting element between a first power supply line and a second power supply line, and a boost module of which an input terminal is loaded with a boost input signal. A source and a gate of the driving transistor are respectively electrically connected to the light emitting element and the data transistor, and an output terminal of the boost module is electrically connected to the gate of the driving transistor to enable the voltage of the gate of the driving transistor to boost from a first voltage to a second voltage.

## Claims

### Claim 1

A pixel driving circuit, comprising:
a driving transistor connected in series with a light emitting element between a first power supply line and a second power supply line, wherein a source of the driving transistor is electrically connected to the light emitting element;
a data transistor, wherein a source of the data transistor is electrically connected to a data line, a drain of the data transistor is electrically connected to a gate of the driving transistor, and a gate of the data transistor is loaded with a data control signal; and
a boost module, wherein an input terminal of the boost module is configured to be loaded with a boost input signal, and an output terminal of the boost module is electrically connected to the gate of the driving transistor;
wherein the boost module is configured to control the voltage of the gate of the driving transistor to boost from a first voltage in a first stage to a second voltage in a second stage, the second stage is later than the first stage, and the driving transistor is configured to generate a driving current based at least on the second voltage to drive the light emitting element to emit light;
wherein the boost module comprises:
a first capacitor, wherein a first electrode plate of the first capacitor is electrically connected to the gate of the driving transistor to server as the output terminal of the boost module; and
a first boost transistor, wherein a drain of the first boost transistor is electrically connected to a second electrode plate of the first capacitor, a source of the first boost transistor is electrically connected to the input terminal of the boost module, a gate of the first boost transistor is loaded with a first boost control signal, and the first boost transistor is turned on in both the first stage and the second stage; and
wherein the boost input signal has a first boost input voltage in the first stage and a second boost input voltage in the second stage, and the second boost input voltage is greater than the first boost input voltage.

### Claim 2 (depends on 1)

The pixel driving circuit of claim 1, wherein the boost module further comprises:
a second boost transistor, wherein a drain of the second boost transistor is electrically connected to the source of the first boost transistor, a source of the second boost transistor is electrically connected to the input terminal of the boost module, a gate of the second boost transistor is loaded with a second boost control signal, and the second boost transistor is turned on in both the first stage and the second stage; and
wherein the gate of the first boost transistor is electrically connected to the gate of the driving transistor.

### Claim 3 (depends on 1)

The pixel driving circuit of claim 1, wherein the gate of the first boost transistor is electrically connected to a boost control line to be loaded with a first boost control signal, wherein the first boost control signal is a light emitting control signal.

### Claim 4 (depends on 1)

The pixel driving circuit of claim 1, further comprising:
a second capacitor, wherein a first electrode plate of the second capacitor is electrically connected to the second electrode plate of the first capacitor and a second electrode plate of the second capacitor is electrically connected to the source or the drain of the driving transistor.

### Claim 5 (depends on 1)

The pixel driving circuit of claim 1, wherein the boost module further comprises:
a third capacitor; and
a boost switch connected in series with the third capacitor between the gate of the driving transistor and the source of the driving transistor;
wherein in the first stage and a third stage earlier than the first stage, the boost switch is turned on to control the voltage of the gate of the driving transistor to boost from a third voltage in the third stage to the first voltage in the first stage.

### Claim 6 (depends on 1)

The pixel driving circuit of claim 1, further comprising:
a reset transistor, wherein a source of the reset transistor is electrically connected to a reset line, a drain of the reset transistor is electrically connected to the source of the driving transistor, and a gate of the reset transistor is loaded with a reset control signal.

### Claim 7

A display panel, comprising a plurality of pixel driving circuits, each of the pixel driving circuits comprises:
a driving transistor connected in series with a light emitting element between a first power supply line and a second power supply line, wherein a source of the driving transistor is electrically connected to the light emitting element;
a data transistor, wherein a source of the data transistor is electrically connected to a data line, a drain of the data transistor is electrically connected to a gate of the driving transistor, and a gate of the data transistor is loaded with a data control signal; and
a boost module, wherein an input terminal of the boost module is configured to be loaded with a boost input signal, and an output terminal of the boost module is electrically connected to the gate of the driving transistor;
wherein the boost module is configured to control the voltage of the gate of the driving transistor to boost from a first voltage in a first stage to a second voltage in a second stage, the second stage is later than the first stage, and the driving transistor is configured to generate a driving current based at least on the second voltage to drive the light emitting element to emit light;
wherein the boost module comprises:
a first capacitor, wherein a first electrode plate of the first capacitor is electrically connected to the gate of the driving transistor to server as the output terminal of the boost module; and
a first boost transistor, wherein a drain of the first boost transistor is electrically connected to a second electrode plate of the first capacitor, a source of the first boost transistor is electrically connected to the input terminal of the boost module, a gate of the first boost transistor is loaded with a first boost control signal, and the first boost transistor is turned on in both the first stage and the second stage; and
wherein the boost input signal has a first boost input voltage in the first stage and a second boost input voltage in the second stage, and the second boost input voltage is greater than the first boost input voltage.

### Claim 8 (depends on 7)

The display panel of claim 7, further comprising:
a data generation chip disposed on at least one side of the plurality of the pixel driving circuits, wherein the plurality of the data lines are electrically connected to the data generation chip to acquire a data signal.

### Claim 9 (depends on 8)

The display panel of claim 8, wherein for the pixel driving circuit away from the data generation chip compared with the pixel driving circuit close to the data generation chip, a voltage value of the data signal has a larger absolute value.

### Claim 10 (depends on 8)

The display panel of claim 8, further comprising:
a signal generation chip disposed on at least one side of the plurality of the pixel driving circuits, wherein an input terminal of each of a plurality of the boost modules is electrically connected to the signal generation chip to acquire the boost input signal;
wherein the boost input signal has a first boost input voltage in the first stage and a second boost input voltage in the second stage, and the second boost input voltage is greater than the first boost input voltage; and
wherein for the pixel driving circuit away from the data generation chip compared with the pixel driving circuit close to the data generation chip, a difference between the second boost input signal and the first boost input signal is larger.

### Claim 11

A display panel, comprising a pixel driving circuit comprising:
a first transistor connected in series with a light emitting element between a first power supply line and a second power supply line, wherein a source of the first transistor is electrically connected to the light emitting element;
a second transistor, wherein a source of the second transistor is electrically connected to a first signal line, a drain of the second transistor is electrically connected to a gate of the first transistor, and a gate of the second transistor is electrically connected to a second signal line; and
a first module, wherein an input terminal of the first module is electrically connected to a third signal line, an output terminal of the first module is electrically connected to the gate of the first transistor, and a control terminal of the first module is electrically connected to a fourth signal line;
wherein the first module comprises:
a first capacitor, wherein a first electrode plate of the first capacitor is electrically connected to the gate of the driving transistor to serve as the output terminal of the first module;
a third transistor, wherein a drain of the third transistor is electrically connected to a second electrode plate of the first capacitor, a source of the third transistor is electrically connected to the input terminal of the first module, and a gate of the third transistor is electrically connected to the fourth signal line; and
a fourth transistor, wherein a drain of the fourth transistor is electrically connected to the drain of the third transistor, a source of the fourth transistor is electrically connected to the input terminal of the first module, and a gate of the fourth transistor is electrically connected to a fifth signal line different from the gate of the first transistor; and
wherein the gate of the third transistor is electrically connected to the gate of the first transistor.

### Claim 12 (depends on 11)

The display panel of claim 11, wherein the pixel driving circuit further comprises:
a second capacitor, wherein a first electrode plate of the second capacitor is electrically connected to the second electrode plate of the first capacitor and a second electrode plate of the second capacitor is electrically connected to the source or the drain of the first transistor.

### Claim 13 (depends on 11)

The display panel of claim 11, wherein the first module further comprises:
a third capacitor; and
a first switch connected in series with the third capacitor between the gate of the first transistor and the source of the first transistor, wherein the first switch is configured to control the third capacitor to be electrically connected between the gate of the first transistor and the source of the first transistor.

### Claim 14 (depends on 11)

The display panel of claim 11, further comprising:
a fifth transistor, wherein a source of the fifth transistor is electrically connected to a sixth signal line, a drain of the fifth transistor is electrically connected to the source of the first transistor, and a gate of the fifth transistor is electrically connected to a seventh signal line.

### Claim 15 (depends on 11)

The display panel of claim 11, comprising a plurality of the pixel driving circuits and further comprising:
a data generation chip disposed on at least one side of the plurality of the pixel driving circuits, wherein the plurality of the data lines are electrically connected to the data generation chip to acquire a data signal.

### Claim 16 (depends on 15)

The display panel of claim 15, wherein for the pixel driving circuit away from the data generation chip compared with the pixel driving circuit close to the data generation chip, a voltage value of the data signal has a larger absolute value.

### Claim 17 (depends on 15)

The display panel of claim 15, further comprising:
a signal generation chip disposed on at least one side of the plurality of the pixel driving circuits, wherein an input terminal of each of a plurality of the boost modules is electrically connected to the signal generation chip to acquire the boost input signal;
wherein the boost input signal has a first boost input voltage in the first stage and a second boost input voltage in the second stage, and the second boost input voltage is greater than the first boost input voltage; and
wherein for the pixel driving circuit away from the data generation chip compared with the pixel driving circuit close to the data generation chip, a difference between the second boost input signal and the first boost input signal is larger.
