# US 12,183,257 B2 · Electronic device and its driving method with an adjustable driving voltage > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,183,257 B2 - Document ID: US12183257B2 - Status: Granted - Kind: B2 - Application number: 18/510,598 - Filed: 2023-11-15 - Published: 2024-06-20 - Granted: 2024-12-31 - Earliest claimed: 2022-12-20 - Assignees: Innolux Corporation - Applicants: InnoLux Corporation - Inventors: Yu-Hsin Feng; Yu-Tse Lu; Jen-Chieh Hsieh; Yao-Lien Hsieh - Web page: https://patentgrep.com/patent/US12183257B2 ## CPC - G09G 3/2092: {Details of a display terminals using a flat panel, the details relating to the control arrangement of the display terminal and to the interfaces thereto (suitable for both CRT and flat panel G09G5/003; specific for a CRT G09G1/165)} - G09G 3/3266: Details of drivers for scan electrodes - G09G 2310/0267: Details of drivers for scan electrodes, other than drivers for liquid crystal, plasma or OLED displays - G09G 2310/0289: Details of voltage level shifters arranged for use in a driving circuit - G09G 2310/08: Details of timing specific for flat panels, other than clock recovery - G09G 2330/021: Power management, e.g. power saving - G09G 2330/12: Test circuits or failure detection circuits included in a display system, as permanent part thereof - G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00) ## Abstract An electronic device includes a display panel, a gate driving circuit and a control unit. The display panel includes a display scan line and a dummy scan line. The gate driving circuit includes a first output unit for providing a display scan signal to the display scan line, and a second output unit for providing a test scan signal to the dummy scan line. The control unit is electrically connected to the gate driving circuit for receiving the test scan signal, updating a driving voltage according to the test scan signal, and driving the gate driving circuit according to the updated driving voltage. ## Claims ### Claim 1 An electronic device comprising: a display panel comprising a display scan line and a dummy scan line; a gate driving circuit comprising: a first output unit for providing a display scan signal to the display scan line; and a second output unit for providing a test scan signal to the dummy scan line; and a control unit electrically connected to the gate driving circuit for receiving the test scan signal, updating a driving voltage according to the test scan signal, and driving the gate driving circuit according to the updated driving voltage. ### Claim 2 (depends on 1) The electronic device of claim 1, wherein the control unit receives the test scan signal periodically. ### Claim 3 (depends on 1) The electronic device of claim 1, wherein: if an output voltage of the test scan signal is lower than a predetermined voltage, the control unit increases the driving voltage to generate the updated driving voltage. ### Claim 4 (depends on 1) The electronic device of claim 1, wherein: if an output voltage of the test scan signal is higher than a predetermined voltage, the control unit decreases the driving voltage to generate the updated driving voltage. ### Claim 5 (depends on 1) The electronic device of claim 1, wherein: the first output unit comprises: a precharge transistor for receiving a pulse to generate a precharge voltage; and the second output unit comprises: a voltage drop unit coupled to the precharge transistor for stepping down the precharge voltage to generate a reduced voltage. ### Claim 6 (depends on 5) The electronic device of claim 5, wherein: the first output unit further comprises: a first capacitor coupled to the first precharge transistor for being charged by the first precharge voltage; and a first driving transistor comprising: a control end coupled to the first capacitor; and a first end for receiving a clock signal, the clock signal being generated according to the updated driving voltage; and the second output unit further comprises: a second capacitor coupled to the second precharge transistor for being charged by the reduced voltage; and a second driving transistor comprising: a control end coupled to the second capacitor; a first end for receiving the clock signal; and a second end for outputting the test scan signal. ### Claim 7 (depends on 6) The electronic device of claim 6, wherein: a transistor size of the first driving transistor is equal to a transistor size of the second driving transistor. ### Claim 8 (depends on 6) The electronic device of claim 6, wherein: an aspect ratio of the second driving transistor is smaller than an aspect ratio of the first driving transistor. ### Claim 9 (depends on 1) The electronic device of claim 1, wherein: the first output unit comprises: a first precharge transistor for receiving a pulse to generate a first precharge voltage; a first capacitor coupled to the first precharge transistor for being charged by the first precharge voltage; and a first driving transistor comprising: a control end coupled to the first capacitor; a first end for receiving a clock signal, the clock signal being generated according to the updated driving voltage; and a second end for outputting the display scan signal; and the second output unit comprises: a second precharge transistor for receiving a pulse to generate a second precharge voltage; a second capacitor coupled to the second precharge transistor for being charged by the second precharge voltage; and a second driving transistor comprising: a control end coupled to the second capacitor; a first end for receiving the clock signal; and a second end for outputting the test scan signal; wherein an aspect ratio of the second driving transistor is smaller than an aspect ratio of the first driving transistor. ### Claim 10 (depends on 1) The electronic device of claim 1, wherein: the display panel has a display area and an adjacent surrounding area, and the display scan line is formed in the display area, and the dummy scan line is formed in the surrounding area. ### Claim 11 (depends on 1) The electronic device of claim 1, wherein: the gate driving circuit is integrated on a substrate of the display panel. ### Claim 12 (depends on 1) The electronic device of claim 1, wherein: the control unit comprises: a timing controller; and a level shifter coupled to the timing controller. ### Claim 13 (depends on 12) The electronic device of claim 12, wherein: the timing controller outputs an initial driving voltage having a predetermined level to the level shifter; and the level shifter adjusts the initial driving voltage to generate the updated driving voltage, and outputs a start signal and a clock signal to the gate driving circuit according to the updated driving voltage. ### Claim 14 A method for driving an electronic device, the electronic device comprising a display panel, a gate driving circuit and a control unit, the display panel comprising a display scan line and a dummy scan line, the gate driving circuit comprising a first output unit and a second output unit, the control unit being electrically connected to the gate driving circuit, the method comprising: the first output unit providing a display scan signal to the display scan line, the second output unit providing a test scan signal to the dummy scan line; the control unit receiving the test scan signal; the control unit updating a driving voltage according to the test scan signal to generate an updated driving voltage; and the control unit driving the gate driving circuit according to the updated driving voltage. ### Claim 15 (depends on 14) The method of claim 14, wherein the control unit updating the driving voltage according to the test scan signal to generate the updated driving voltage comprises: if the control unit receives the test scan signal at a non-predetermined time, the control unit determines that the test scan signal is abnormal. ### Claim 16 (depends on 14) The method of claim 14, wherein the control unit updating the driving voltage according to the test scan signal to generate the updated driving voltage comprises: if the second output voltage of the test scan signal is lower than the predetermined voltage, the control unit determines that the test scan signal is abnormal. ### Claim 17 (depends on 14) The method of claim 14, wherein the control unit updating the driving voltage according to the test scan signal to generate the updated driving voltage comprises: if the control unit receives the test scan signal at a predetermined time and the second output voltage of the test scan signal is greater than the predetermined voltage, the control unit determines that the test scan signal is normal. ### Claim 18 (depends on 14) The method of claim 14, wherein the control unit updating the driving voltage according to the test scan signal to generate the updated driving voltage comprises: if the test scan signal is normal, the control unit decreasing the driving voltage to generate the updated driving voltage. ### Claim 19 (depends on 14) The method of claim 14, wherein the control unit updating the driving voltage according to the test scan signal to generate the updated driving voltage comprises: if the test scan signal is abnormal, the control unit increasing the driving voltage to generate the updated driving voltage. ### Claim 20 (depends on 14) The method of claim 14, further comprising: the control unit storing a predetermined voltage; wherein the control unit updating the driving voltage according to the test scan signal to generate the updated driving voltage comprises: if an output voltage of the test scan signal is lower than the predetermined voltage, the control unit increasing the driving voltage to generate the updated driving voltage; and if the output voltage of the test scan signal is higher than the predetermined voltage, the control unit decreasing the driving voltage to generate the updated driving voltage.