# US 12,183,226 B2 · Test pad and chip on film package including the same

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- Number: US 12,183,226 B2
- Document ID: US12183226B2
- Status: Granted
- Kind: B2
- Application number: 17/858,154
- Filed: 2022-07-06
- Published: 2023-01-12
- Granted: 2024-12-31
- Earliest claimed: 2021-07-12
- Assignees: Lx Semicon Co., Ltd.
- Applicants: Lx Semicon Co., Ltd.
- Inventors: Seung Hoon Jin; Young Min Choi
- Web page: https://patentgrep.com/patent/US12183226B2

## CPC

- G02F 1/13452: {Conductors connecting driver circuitry and terminals of panels}
- G09G 3/006: {Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays (testing individual LED's G01R31/2635; testing lamps G01R31/44; testing of optical features of LCD displays G02F1/1309)}
- G02F 1/13458: {Terminal pads}
- G02F 1/13454: {Drivers integrated on the active matrix substrate (G02F1/136277 takes precedence)}
- G09G 2300/0408: Integration of the drivers onto the display substrate
- G09G 2300/0426: Layout of electrodes and connections
- G09G 2330/12: Test circuits or failure detection circuits included in a display system, as permanent part thereof
- G02F: OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00)

## Abstract

A chip on film (COF) package in which a predetermined driving integrated circuit (IC) is mounted includes a wiring structure connected to the driving IC, and a test pad connected to the wiring structure, wherein the test pad includes a base film divided into a first region and a second region, and a conductive layer located in the first region, and the second region is surrounded by the first region in a plan view.

## Claims

### Claim 1

A test pad for testing a chip on film (COF) package on which a driving integrated circuit (IC) is mounted, the test pad comprising:
a base film divided into a first region and a second region; and
a conductive layer located in the first region, wherein
the second region is surrounded by the first region in a plan view, and
the second region does not overlap the driving IC.

### Claim 2 (depends on 1)

The test pad according to claim 1, wherein
the conductive layer includes a first conductive layer located in the first region, and
a second conductive layer which is located on the first conductive layer and is in contact with the first conductive layer.

### Claim 3 (depends on 1)

The test pad according to claim 1, wherein the base film is exposed in the second region.

### Claim 4 (depends on 1)

The test pad according to claim 1, wherein
a groove formed in the second region has a side surface defined by the conductive layer located in the first region and a bottom surface defined by the base film.

### Claim 5 (depends on 1)

The test pad according to claim 1, further comprising:
an insulating member located on the conductive layer in the first region, wherein
the conductive layer is located in the first region and the second region.

### Claim 6 (depends on 5)

The test pad according to claim 5, wherein
a groove formed in the second region has a side surface defined by the insulating member and a bottom surface is defined by the conductive layer located in the second region.

### Claim 7 (depends on 1)

The test pad according to claim 1, wherein the second region has a width of 20 μm or more.

### Claim 8 (depends on 1)

The test pad according to claim 1, wherein
the test pad comprises a groove in the second region for accommodating a probe object for testing the COF package.

### Claim 9

A chip on film (COF) package in which a driving integrated circuit (IC) is mounted, the COF package comprising:
a wiring structure connected to the driving IC; and
a test pad connected to the wiring structure, wherein
the test pad includes a base film divided into a first region and a second region, and a conductive layer located in the first region,
the second region is surrounded by the first region in a plan view, and
the second region does not overlap the driving IC.

### Claim 10 (depends on 9)

The COF package according to claim 9, wherein the conductive layer includes a first conductive layer located in the first region and a second conductive layer in contact with the first conductive layer.

### Claim 11 (depends on 10)

The COF package according to claim 10, wherein
at least one of the first conductive layer and the second conductive layer located in the first region surrounds the second region in a plan view, and
the base film is exposed in the second region.

### Claim 12 (depends on 10)

The COF package according to claim 10, wherein
a groove formed in the second region has a side surface defined by at least one of the first conductive layer and the second conductive layer located in the first region and a bottom surface defined by the base film.

### Claim 13 (depends on 9)

The COF package according to claim 9, wherein the test pad further includes an insulating member located on the conductive layer in the first region.

### Claim 14 (depends on 13)

The COF package according to claim 13, wherein
a groove formed in the second region has a side surface defined by the insulating member located in the first region and a bottom surface defined by at least one of a first conductive layer and a second conductive layer located in the second region.

### Claim 15 (depends on 13)

The COF package according to claim 13, wherein
the insulating member extends in a first direction in which the wiring structure extends and covers at least a part of the wiring structure, and
the insulating member includes a solder resist.

### Claim 16 (depends on 9)

The COF package according to claim 9, wherein
the conductive layer includes a first conductive layer located in the first region and a second conductive layer in contact with the first conductive layer,
the wiring structure includes a first wiring pattern layer located on the base film and a second wiring pattern layer located on the first wiring pattern layer, and
the first wiring pattern layer and the first conductive layer are integrally formed, and the second wiring pattern layer and the second conductive layer are integrally formed.

### Claim 17 (depends on 9)

The COF package according to claim 9, wherein
the COF package comprises a groove in the second region for accommodating a probe object for testing the COF package.
