# US 12,182,570 B2 · Apparatuses, methods, and systems for a packed data convolution instruction with shift control and width control > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,182,570 B2 - Document ID: US12182570B2 - Status: Granted - Kind: B2 - Application number: 17/359,354 - Filed: 2021-06-25 - Published: 2022-12-29 - Granted: 2024-12-31 - Earliest claimed: 2021-06-25 - Assignees: Intel Corporation - Applicants: Intel Corporation - Inventors: Deepti Aggarwal; Michael Espig; Robert Valentine; Sumit Mohan; Prakaram Joshi; Richard Winterton - Web page: https://patentgrep.com/patent/US12182570B2 ## CPC - G06F 9/30036: {Instructions to perform operations on packed data, e.g. vector, tile or matrix operations} - G06F 9/3001: {Arithmetic instructions} - G06F 9/30032: {Movement instructions, e.g. MOVE, SHIFT, ROTATE, SHUFFLE} - G06F 9/30038: {using a mask} - G06F 9/30101: {Special purpose registers} - G06F 9/30145: {Instruction analysis, e.g. decoding, instruction word fields} - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) ## Abstract Systems, methods, and apparatuses to support packed data convolution instructions with shift control and width control are described. In one embodiment, a hardware processor includes a decoder circuit to decode a single instruction into a decoded single instruction, the single instruction having fields that identify a first packed data source, a second packed data source, a packed data destination, a sliding window width, and a stride, and an opcode that indicates an execution circuit is to generate a first chunk of contiguous elements of the first packed data source having a width of the sliding window width, generate a second chunk of contiguous elements of the first packed data source having the width of the sliding window width and shifted by the stride, multiply each element of the first chunk by a corresponding element of a respective chunk of the second packed data source to generate a first set of products, add the first set of products together to generate a first sum, multiply each element of the second chunk by a corresponding element of a respective chunk of the second packed data source to generate a second set of products, add the second set of products together to generate a second sum, and store the first sum in a first element of the packed data destination and the second sum in a second element of the packed data destination; and the execution circuit is to execute the decoded single instruction according to the opcode. ## Claims ### Claim 1 An apparatus comprising: a decoder circuit to decode a single instruction into a decoded single instruction, the single instruction having fields that identify a first packed data source, a second packed data source, a packed data destination, a sliding window width, and a stride, and an opcode that indicates an execution circuit is to: generate a first chunk of contiguous elements of the first packed data source having a width of the sliding window width, generate a second chunk of contiguous elements of the first packed data source having the width of the sliding window width and shifted by the stride, multiply each element of the first chunk by a corresponding element of a respective chunk of the second packed data source to generate a first set of products, add the first set of products together to generate a first sum, multiply each element of the second chunk by a corresponding element of a respective chunk of the second packed data source to generate a second set of products, add the second set of products together to generate a second sum, and store the first sum in a first element of the packed data destination and the second sum in a second element of the packed data destination; and the execution circuit to execute the decoded single instruction according to the opcode. ### Claim 2 (depends on 1) The apparatus of claim 1, wherein the sliding window width is selectable from a plurality of widths. ### Claim 3 (depends on 2) The apparatus of claim 2, wherein the sliding window width is identified by an immediate of the single instruction. ### Claim 4 (depends on 1) The apparatus of claim 1, wherein the stride is selectable from a plurality of strides. ### Claim 5 (depends on 4) The apparatus of claim 4, wherein the stride is identified by an immediate of the single instruction. ### Claim 6 (depends on 1) The apparatus of claim 1, wherein the sliding window width and the stride are identified by an immediate of the single instruction. ### Claim 7 (depends on 1) The apparatus of claim 1, wherein the first packed data source and the second packed data source have a same element width, and the packed data destination has a wider element width. ### Claim 8 (depends on 1) The apparatus of claim 1, wherein the packed data destination is also a third packed data source, and the opcode indicates the execution circuit is to, before the store, accumulate the first sum with a first value from a first element of the third packed data source to update the first sum, accumulate the second sum with a second value from a second element of the third packed data source to update the second sum, and the store is of the updated first sum in the first element of the packed data destination and the updated second sum in the second element of the packed data destination. ### Claim 9 A method comprising: decoding a single instruction into a decoded single instruction by a decoder circuit of a processor core, the single instruction having fields that identify a first packed data source, a second packed data source, a packed data destination, a sliding window width, and a stride, and an opcode that indicates an execution circuit is to: generate a first chunk of contiguous elements of the first packed data source having a width of the sliding window width, generate a second chunk of contiguous elements of the first packed data source having the width of the sliding window width and shifted by the stride, multiply each element of the first chunk by a corresponding element of a respective chunk of the second packed data source to generate a first set of products, add the first set of products together to generate a first sum, multiply each element of the second chunk by a corresponding element of a respective chunk of the second packed data source to generate a second set of products, add the second set of products together to generate a second sum, and store the first sum in a first element of the packed data destination and the second sum in a second element of the packed data destination; and executing the decoded single instruction by the execution circuit of the processor core according to the opcode. ### Claim 10 (depends on 9) The method of claim 9, wherein the sliding window width is selectable from a plurality of widths. ### Claim 11 (depends on 10) The method of claim 10, wherein the sliding window width is identified by an immediate of the single instruction. ### Claim 12 (depends on 9) The method of claim 9, wherein the stride is selectable from a plurality of strides. ### Claim 13 (depends on 12) The method of claim 12, wherein the stride is identified by an immediate of the single instruction. ### Claim 14 (depends on 9) The method of claim 9, wherein the sliding window width and the stride are identified by an immediate of the single instruction. ### Claim 15 (depends on 9) The method of claim 9, wherein the first packed data source and the second packed data source have a same element width, and the packed data destination has a wider element width. ### Claim 16 (depends on 9) The method of claim 9, wherein the packed data destination is also a third packed data source, and the opcode indicates the execution circuit is to, before the store, accumulate the first sum with a first value from a first element of the third packed data source to update the first sum, accumulate the second sum with a second value from a second element of the third packed data source to update the second sum, and the store is of the updated first sum in the first element of the packed data destination and the updated second sum in the second element of the packed data destination. ### Claim 17 A non-transitory machine readable medium that stores program code that when executed by a machine causes the machine to perform a method comprising: decoding a single instruction into a decoded single instruction by a decoder circuit of a processor core, the single instruction having fields that identify a first packed data source, a second packed data source, a packed data destination, a sliding window width, and a stride, and an opcode that indicates an execution circuit is to: generate a first chunk of contiguous elements of the first packed data source having a width of the sliding window width, generate a second chunk of contiguous elements of the first packed data source having the width of the sliding window width and shifted by the stride, multiply each element of the first chunk by a corresponding element of a respective chunk of the second packed data source to generate a first set of products, add the first set of products together to generate a first sum, multiply each element of the second chunk by a corresponding element of a respective chunk of the second packed data source to generate a second set of products, add the second set of products together to generate a second sum, and store the first sum in a first element of the packed data destination and the second sum in a second element of the packed data destination; and executing the decoded single instruction by the execution circuit of the processor core according to the opcode. ### Claim 18 (depends on 17) The non-transitory machine readable medium of claim 17, wherein the sliding window width is selectable from a plurality of widths. ### Claim 19 (depends on 18) The non-transitory machine readable medium of claim 18, wherein the sliding window width is identified by an immediate of the single instruction. ### Claim 20 (depends on 17) The non-transitory machine readable medium of claim 17, wherein the stride is selectable from a plurality of strides. ### Claim 21 (depends on 20) The non-transitory machine readable medium of claim 20, wherein the stride is identified by an immediate of the single instruction. ### Claim 22 (depends on 17) The non-transitory machine readable medium of claim 17, wherein the sliding window width and the stride are identified by an immediate of the single instruction. ### Claim 23 (depends on 17) The non-transitory machine readable medium of claim 17, wherein the first packed data source and the second packed data source have a same element width, and the packed data destination has a wider element width. ### Claim 24 (depends on 17) The non-transitory machine readable medium of claim 17, wherein the packed data destination is also a third packed data source, and the opcode indicates the execution circuit is to, before the store, accumulate the first sum with a first value from a first element of the third packed data source to update the first sum, accumulate the second sum with a second value from a second element of the third packed data source to update the second sum, and the store is of the updated first sum in the first element of the packed data destination and the updated second sum in the second element of the packed data destination.