# US 12,182,433 B2 · Adaptive memory partition closure time > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,182,433 B2 - Document ID: US12182433B2 - Status: Granted - Kind: B2 - Application number: 17/892,581 - Filed: 2022-08-22 - Published: 2024-02-22 - Granted: 2024-12-31 - Earliest claimed: 2022-08-22 - Assignees: Micron Technology, Inc. - Applicants: Micron Technology, Inc. - Inventors: Zhongguang Xu - Web page: https://patentgrep.com/patent/US12182433B2 ## CPC - G06F 3/0644: {Management of space entities, e.g. partitions, extents, pools} - G06F 3/0614: {Improving the reliability of storage systems} - G06F 3/064: {Management of blocks} - G06F 3/0679: {Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]} - G11C 16/0483: {comprising cells having several storage transistors connected in series} - G11C 16/08: Address circuits; Decoders; Word-line control circuits - G11C 16/26: Sensing or reading circuits; Data output circuits - G11C 16/32: Timing circuits - G11C 16/349: {Arrangements for evaluating degradation, retention or wearout, e.g. by counting erase cycles} - G11C 29/021: {in voltage or current generators} - G11C 29/028: {with adaption or trimming of parameters} - G06F 3/0604: {Improving or facilitating administration, e.g. storage management} - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) - G11C: STATIC STORES (semiconductor memory devices H10B) ## Abstract Aspects of the present disclosure configure a system component, such as a memory sub-system controller, to perform adaptive read level threshold voltage operations. The controller determines a memory reliability value associated with an individual portion of the set of memory components and selects a partition closing time for the individual portion of the set of memory components based on the memory reliability value. The controller defines a partition of the individual portion of the set of memory components based on the partition closing time and associates the partition with a bin of a plurality of bins, each of the plurality of bins representing an individual read level threshold voltage against which a charge distribution of data stored in the individual portion of the set of memory components is compared to determine one or more logical values. ## Claims ### Claim 1 A system comprising: a memory sub-system comprising a set of memory components; and a processing device, operatively coupled to the set of memory components and configured to perform operations comprising: determining a memory reliability value associated with an individual portion of the set of memory components; storing data that associates different ranges of memory reliability values with different partition closing times; selecting, based on the stored data, a partition closing time for the individual portion of the set of memory components based on the memory reliability value; defining a partition of the individual portion of the set of memory components based on the partition closing time; and associating the partition with a bin of a plurality of bins, each of the plurality of bins representing an individual read level threshold voltage against which a charge distribution of data stored in the individual portion of the set of memory components is compared to determine one or more logical values. ### Claim 2 (depends on 1) The system of claim 1, wherein the bin is a first bin representing a first read level threshold voltage against which the charge distribution is compared to determine the one or more logical values, and wherein the operations comprise: determining that a time interval elapsed since a collection of data was initially programmed in the partition corresponds to the partition closing time; and in response to determining that the time interval has elapsed, associating the partition with a second bin of the plurality of bins, the second bin representing a second read level threshold voltage against which the charge distribution is compared to determine the one or more logical values. ### Claim 3 (depends on 2) The system of claim 2, wherein the operations comprise: preventing additional data from being stored in the partition of the individual portion of the set of memory components in response to determining that the time interval has elapsed. ### Claim 4 (depends on 2) The system of claim 2, wherein the operations comprise: selecting a set of bin scan frequencies from a plurality of sets of bin scan frequencies based on the memory reliability value associated with the individual portion of the set of memory components. ### Claim 5 (depends on 4) The system of claim 4, wherein the operations comprise: selecting an individual bin scan frequency from the selected set of bin scan frequencies corresponding to the second bin; and determining whether to associate the partition with a third bin of the plurality of bins instead of the second bin periodically based on the selected individual bin scan frequency. ### Claim 6 (depends on 1) The system of claim 1, wherein the operations comprise: determining that a time interval elapsed since a collection of data was initially programmed in the partition corresponds to the partition closing time; and closing the partition in response to determining that the time interval elapsed to define the partition. ### Claim 7 (depends on 6) The system of claim 6, wherein the partition is a first partition, and wherein the operations comprise: receiving a request to write data to the individual portion of the set of memory components after the first partition has been closed; and in response to receiving the request, writing the data to a second partition of the individual portion of the set of memory components. ### Claim 8 (depends on 7) The system of claim 7, wherein the operations comprise: initiating a timer for the second partition in response to receiving the request; and closing the second partition in response to determining that the timer has reached the partition closing time corresponding to the individual portion of the set of memory components. ### Claim 9 (depends on 8) The system of claim 8, wherein the bin is a first bin representing a first read level threshold voltage against which the charge distribution is compared to determine the one or more logical values, and wherein the operations comprise: associating the first partition with a second bin of the plurality of bins, the second bin representing a second read level threshold voltage against which the charge distribution is compared to determine the one or more logical values; and associating the second partition with the first bin of the plurality of bins. ### Claim 10 (depends on 1) The system of claim 1, wherein the individual portion is a first portion, wherein the memory reliability value is a first memory reliability value, wherein the partition closing time is a first partition closing time, and wherein the operations comprise: receiving a request to write data to a second portion of the set of memory components; determining a second memory reliability value associated with the second portion of the set of memory components; and selecting a second partition closing time for the second portion of the set of memory components based on the second memory reliability value. ### Claim 11 (depends on 10) The system of claim 10, wherein the second partition closing time is shorter than the first partition closing time. ### Claim 12 (depends on 10) The system of claim 10, wherein the operations comprise: defining a partition of the second portion of the set of memory components based on the second partition closing time; and associating the partition of the second portion with the bin. ### Claim 13 (depends on 1) The system of claim 1, wherein the memory reliability value represents a quantity of program-erase (PE) cycles (PECs). ### Claim 14 (depends on 1) The system of claim 1, wherein the memory reliability value represents an age of the memory sub-system. ### Claim 15 (depends on 1) The system of claim 1, wherein the individual portion includes a superblock comprising a plurality of memory blocks across a plurality of memory dies. ### Claim 16 (depends on 1) The system of claim 1, wherein the memory sub-system comprises a three-dimensional (3D) NAND storage device. ### Claim 17 (depends on 1) The system of claim 1, wherein the operations comprise: searching the data to identify a range of memory reliability values corresponding to the memory reliability value associated with the individual portion of the set of memory components; and retrieving the partition closing time from the data associated with the identified range of memory reliability values. ### Claim 18 A method comprising: determining a memory reliability value associated with an individual portion of a set of memory components; storing data that associates different ranges of memory reliability values with different partition closing times; selecting, based on the stored data, a partition closing time for the individual portion of the set of memory components based on the memory reliability value; defining a partition of the individual portion of the set of memory components based on the partition closing time; and associating the partition with a bin of a plurality of bins, each of the plurality of bins representing an individual read level threshold voltage against which charge distribution of data stored in the individual portion of the set of memory components is compared to determine one or more logical values. ### Claim 19 A non-transitory computer-readable storage medium comprising instructions that, when executed by a processing device, cause the processing device to perform operations comprising: determining a memory reliability value associated with an individual portion of a set of memory components; storing data that associates different ranges of memory reliability values with different partition closing times; selecting, based on the stored data, a partition closing time for the individual portion of the set of memory components based on the memory reliability value; defining a partition of the individual portion of the set of memory components based on the partition closing time; and associating the partition with a bin of a plurality of bins, each of the plurality of bins representing an individual read level threshold voltage against which charge distribution of data stored in the individual portion of the set of memory components is compared to determine one or more logical values. ### Claim 20 (depends on 19) The non-transitory computer-readable storage medium of claim 19, wherein the set of memory components comprises a three-dimensional (3D) NAND storage device.