# US 12,182,431 B2 · Memory system and method of operating the same > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,182,431 B2 - Document ID: US12182431B2 - Status: Granted - Kind: B2 - Application number: 18/207,604 - Filed: 2023-06-08 - Published: 2023-10-19 - Granted: 2024-12-31 - Earliest claimed: 2020-11-04 - Assignees: SK hynix Inc. - Applicants: SK hynix Inc. - Inventors: In Mo Kwak; Jeong Su Park - Web page: https://patentgrep.com/patent/US12182431B2 ## CPC - G06F 3/061: {Improving I/O performance} - G06F 3/064: {Management of blocks} - G06F 3/0604: {Improving or facilitating administration, e.g. storage management} - G06F 3/0635: {by changing the path, e.g. traffic rerouting, path reconfiguration} - G06F 3/0659: {Command handling arrangements, e.g. command buffers, queues, command scheduling} - G06F 3/0679: {Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]} - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) ## Abstract Memory systems and methods of operating the memory systems are disclosed. A memory system including a plurality of data storage zones may comprise a memory device including a plurality of zones for storing data, and a memory controller configured to control the memory device in performing a write operation in the memory device. The memory controller is configured to, upon performing a write operation corresponding to a write request received from a host, update a logical write pointer and a physical write pointer associated with a zone that is targeted to perform the write operation corresponding to the write request received from the host, and upon performing a write operation corresponding an internal write command internally issued by the memory controller, update a physical write pointer associated with the zone that is targeted to perform the write operation corresponding to an internal write command issued by the memory controller. ## Claims ### Claim 1 A memory system including a storage area divided into a plurality of zones, comprising: a memory device having memory blocks constituting the plurality of zones; a memory controller configured to control write operations of the memory device, wherein the memory controller is configured to: receive a write request and a write pointer associated with a zone from a host; and update a physical pointer when the memory device performs the first write operation in response to the write request received from the host, or when the memory device performs a second write operation in response to an internal write command issued by the memory controller, wherein the physical pointer indicates a physical location where a write operation has been most recently performed in the memory device. ### Claim 2 (depends on 1) The memory system based on claim 1, wherein the second write operation corresponding to the internal write command is a dummy data write operation performed by a flash translation layer of the memory controller. ### Claim 3 (depends on 1) The memory system based on claim 1, wherein the memory controller is configured to, upon receiving the write request from the host, compare a logical the write pointer and the physical pointer of a zone corresponding to the received write request with each other and process the write request based on a result of the comparison. ### Claim 4 (depends on 3) The memory system based on claim 3, wherein, when addresses indicated by the write pointer and the physical pointer match each other, the memory controller is configured to determine whether the write pointer has reached a size of the zone and process the write request based on a result of the determination. ### Claim 5 (depends on 4) The memory system based on claim 4, wherein, when the write pointer has reached the size of the zone, the memory controller is configured to provide, to the host, a message indicating that the zone that is targeted to perform the first write operation corresponding to the write request received from the host is full. ### Claim 6 (depends on 4) The memory system based on claim 4, wherein, when the write pointer has not reached the size of the zone, the memory controller is configured to perform the first write operation corresponding to the write request. ### Claim 7 (depends on 3) The memory system based on claim 3, wherein, when addresses indicated by the write pointer and the physical pointer do not match each other, the memory controller is configured to determine whether the physical pointer has reached a size of the zone and process the write request based on a result of the determination. ### Claim 8 (depends on 7) The memory system based on claim 7, wherein, when the physical pointer has reached the size of the zone, the memory controller is configured to provide, to the host, a message indicating that the zone that is targeted to perform the first write operation corresponding to the write request received from the host is full. ### Claim 9 (depends on 7) The memory system based on claim 7, wherein, when the physical pointer has not reached the size of the zone, the memory controller is configured to perform the first write operation corresponding to the write request. ### Claim 10 (depends on 1) The memory system based on claim 1, wherein the memory controller is configured to, upon receiving a data read request and a corresponding read address from the host, compare the write pointer and the physical pointer of a zone corresponding to the received data read request with each other and process the data read request based on a result of the comparison. ### Claim 11 (depends on 10) The memory system based on claim 10, wherein, when addresses indicated by the write pointer and the physical pointer match each other, the memory controller is configured to perform a read operation based on the read address. ### Claim 12 (depends on 10) The memory system based on claim 10, wherein, when addresses indicated by the write pointer and the physical pointer do not match each other, the memory controller is configured to calculate a valid read address from the read address based on a valid page table, and perform a read operation based on the calculated valid read address, and wherein the valid page table includes information indicating whether data in each page stored in the zone that is targeted to perform the read operation corresponding to the data read request received from the host is user data received from the host or dummy data that fills empty spaces in the zone. ### Claim 13 (depends on 12) The memory system based on claim 12, wherein the memory controller is configured to calculate the valid read address from the read address depending on an offset based on the dummy data included in the valid page table. ### Claim 14 (depends on 13) The memory system based on claim 13, wherein the memory controller is configured to: initialize a temporary address to the read address; count a first number of invalid pages between a start address of the zone that is targeted to perform the read operation corresponding to the data read request received from the host and the read address; update the temporary address based on the first number of invalid pages; count a second number of invalid pages between the temporary address before being updated and an updated temporary address; and determine whether the second number of invalid pages is zero. ### Claim 15 (depends on 14) The memory system based on claim 14, wherein, when the second number of invalid pages is zero, the memory controller is configured to determine the updated temporary address to be the valid read address, and wherein, when the second number of invalid pages is not zero, the memory controller is configured to re-update the temporary address based on the second number of invalid pages. ### Claim 16 A memory controller configured to control write operations of a memory device having a storage area divided into a plurality of zones, wherein the memory controller is configured to: receive a write request and a write pointer associated with a zone from a host; and update a physical pointer when the memory device performs the first write operation in response to the write request received from the host, and when the memory device performs a second write operation in response to an internal write command internally issued by the memory controller, wherein the physical pointer indicates a physical location where a write operation has been most recently performed in the memory device. ### Claim 17 (depends on 16) The memory controller based on claim 16, comprising: a host interface layer configured to receive the write request or a read request from the host; a flash translation layer configured to control write operations corresponding to the internal write command; a write buffer configured to store write data received from the host; and a valid page table including information indicating whether data in each page stored in at least one of the plurality of zones is user data received from the host or dummy data that fills empty spaces in the zone. ### Claim 18 A storage system comprising: a host issuing a write request for storing data; a memory controller receiving the write request and a write pointer associated with a zone from a host; and a memory device having a storage area divided into a plurality of zones, wherein the memory controller is configured to: upon performing a first write operation corresponding to the write request received from the host, update a physical pointer associated with a zone that is targeted to perform the first write operation, upon performing a second write operation corresponding to an internal write command internally issued by the memory controller, update the physical pointer associated with the zone that is targeted to perform the second write operation, and wherein the physical pointer indicates a physical location where a write operation has been most recently performed in the memory device. ### Claim 19 (depends on 18) The storage system based on claim 18, wherein the second write operation corresponding to the internal write command is a dummy data write operation performed by a flash translation layer of the memory controller. ### Claim 20 (depends on 1) The memory system based on claim 1, wherein the memory controller is configured to, upon receiving a write request from the host, compare the write pointer and the physical pointer of a zone corresponding to the received write request with each other and process the write request based on a result of the comparison.