Cache block budgeting techniques

A memory system, comprising:

• one or more memory devices;
• and
• processing circuitry coupled with the one or more memory devices and configured to cause the memory system to:
• store, for each block of one or more blocks in a cache of the one or more memory devices, a respective ratio of cycles performed in a first mode to cycles performed in a second mode based at least in part on the one or more blocks in the cache being configured to dynamically switch between operating in the first mode and the second mode, wherein one or more other blocks in the cache are configured to statically operate in the first mode;
• and
• select, based at least in part on a respective ratio of cycles performed in the first mode to cycles performed in the second mode for a block, the block from the one or more blocks to switch from the first mode to the second mode or from the second mode to the first mode, wherein the selected block stores more bits per memory cell after the switch to operating in the second mode.

A memory system, comprising:

• one or more memory devices;
• and
• processing circuitry coupled with the one or more memory devices and configured to cause the memory system to:
• assign, for each block of one or more blocks in a cache of the one or more memory devices, a respective target ratio of cycles performed in a first mode to cycles performed in a second mode, wherein the one or more blocks comprise at least one block configured to dynamically switch between operating in the first mode and operating in the second mode;
• compare, for each block of the one or more blocks in the cache, a respective target ratio of cycles for a respective block with a respective ratio of cycles performed in the first mode to cycles performed in the second mode for the respective block during a periodicity interval;
• and
• select a block from the one or more blocks to switch from the first mode to the second mode or from the second mode to the first mode based at least in part on the comparing.