# US 12,182,013 B2 · Memory sub-system write sequence track

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- Number: US 12,182,013 B2
- Document ID: US12182013B2
- Status: Granted
- Kind: B2
- Application number: 18/519,311
- Filed: 2023-11-27
- Published: 2024-03-14
- Granted: 2024-12-31
- Earliest claimed: 2020-12-16
- Assignees: Micron Technology, Inc.
- Applicants: Micron Technology, Inc.
- Inventors: Karl D. Schuh; Vamsi Pavan Rayaprolu; Jiangang Wu; Kishore K. Muchherla
- Web page: https://patentgrep.com/patent/US12182013B2

## CPC

- G06F 12/0246: {in block erasable memory, e.g. flash memory}
- G06F 3/061: {Improving I/O performance}
- G06F 3/0614: {Improving the reliability of storage systems}
- G06F 3/064: {Management of blocks}
- G06F 3/0653: {Monitoring storage devices or systems}
- G06F 3/0659: {Command handling arrangements, e.g. command buffers, queues, command scheduling}
- G06F 3/0679: {Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]}
- G06F 12/0882: Page mode
- G06F 2212/7201: Logical to physical mapping or translation of blocks or pages
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)

## Abstract

A system includes a memory device and a processing device communicatively coupled to the memory device. The processing device is to write data to a number of groups of memory cells of the memory device in a physically non-contiguous manner. The processing device is further to track a sequence in which the number of groups of memory cells were written with the data. In response to a trigger event, the processing device is further to identify at least a portion of the number of groups of memory cells having data received over a predefined period preceding the trigger event based at least in part on the tracked sequence.

## Claims

### Claim 1

An apparatus, comprising:
a memory device; and
a processing device to:
track a sequence in which data was written to a number of groups of memory cells of the memory device; and
in response to a trigger event, store an entry that includes at least a portion of the tracked sequence in the memory device, wherein the at least the portion of the tracked sequence corresponds to a sequence in which data received over a predefined period preceding the trigger event was written to at least a portion of the number of groups of memory cells;
wherein the entry is associated with a logical address corresponding to a first page or a last page, or both, of the at least the portion of the number of groups of memory cells.

### Claim 2 (depends on 1)

The apparatus of claim 1, wherein:
the number of groups of memory cells correspond to a plurality of blocks of the memory device;
a corresponding logical address corresponding to the first page corresponds to a particular page of a first block of the plurality of blocks of the memory device; and
a corresponding logical address corresponding to the last page corresponds to a particular page of a second block of the plurality of blocks of the memory device.

### Claim 3 (depends on 2)

The apparatus of claim 2, wherein each one of the plurality of blocks corresponds to a superblock whose memory cells are distributed over multiple memory dies of the memory device.

### Claim 4 (depends on 1)

The apparatus of claim 1, wherein in response to a program failure while writing the data received over the predefined period preceding the trigger event is being written to a third page of the at least the portion of the number of groups of memory cells:
a logical address corresponding to a particular page associated with the third page is associated with the entry.

### Claim 5 (depends on 4)

The apparatus of claim 4, wherein the processing device is to perform a refresh operation on the data to copy the data from the at least the portion of the number of groups of memory cells to another number of groups of memory cells.

### Claim 6 (depends on 5)

The apparatus of claim 5, wherein the processing device is to further modify the at least the portion of the tracked sequence to indicate a sequence, in which the data was written to the another number of groups of memory cells.

### Claim 7 (depends on 1)

The apparatus of claim 1, wherein:
the memory device is further coupled to a primary power supply and a secondary power supply; and
the memory device is powered by the primary power supply prior to the trigger event.

### Claim 8 (depends on 7)

The apparatus of claim 7, wherein the secondary power supply are to provide a power supply to the memory device upon the occurrence of the trigger event.

### Claim 9 (depends on 1)

The apparatus of claim 1, wherein at least a portion of the number of groups of memory cells corresponds to a superblock whose memory cells are distributed over multiple memory dies of the memory device.

### Claim 10

An apparatus, comprising:
a memory device comprising a plurality of blocks each comprising a respective plurality of pages; and
a processing device, wherein the processing device is to:
write data to at least a portion of the plurality of blocks, wherein the data are sequentially written to a respective plurality of pages within each one of the plurality of blocks;
store, in response to a first trigger event and in the memory device, an entry including a first sequence in which data received over a predefined period preceding the trigger event was written to a first portion of the plurality of blocks; and
store, in response to a second trigger event and in the memory device, an entry including a second sequence in which data received over the predefined period preceding the another trigger event was written to a second portion of the plurality of blocks.

### Claim 11 (depends on 10)

The apparatus of claim 10, wherein the processing device is configured to write the data to the plurality of blocks in a physically non-contiguous manner.

### Claim 12 (depends on 11)

The apparatus of claim 11, wherein the first sequence or the second sequence, or both, corresponds to a sequence, in which the data was written to blocks of the first portion of the plurality of blocks or blocks of the second portion of the plurality of blocks.

### Claim 13 (depends on 10)

The apparatus of claim 10, wherein each one of the plurality of blocks corresponds to a superblock whose memory cells are distributed over multiple memory dies of the memory device.

### Claim 14 (depends on 10)

The apparatus of claim 10, wherein the processing device is to identify the first sequence or the second sequence without maintaining a logical to physical (L2P) table.

### Claim 15

A method, comprising:
tracking a sequence in which data was written to a number of groups of memory cells of a memory device; and
responsive to a trigger event:
generating an entry including at least a portion of the tracked sequence, wherein:
the at least the portion of the tracked sequence corresponds to a sequence in which data received over a predefined period preceding the trigger event was written to at least a portion of the number of groups of memory cells; and
a logical address corresponding to a first page or a last page, or both, of the at least the portion of the number of groups of memory cells is associated with the entry; and
storing the entry in the memory device.

### Claim 16 (depends on 15)

The method of claim 15, wherein a particular page corresponding to a program failure in writing the data to the at least the portion of the number of groups of memory cells is associated with the entry.

### Claim 17 (depends on 16)

The method of claim 16, further comprising performing a refresh operation on the data written to the at least the portion of the number of groups of memory cells by copying the data from the at least the portion of the number of groups of memory cells to another number of groups of memory cells.

### Claim 18 (depends on 17)

The method of claim 17, further comprising modifying the at least the portion of the tracked sequence to indicate a sequence in which the data was written to the another number of groups of memory cells.

### Claim 19 (depends on 15)

The method of claim 15, further comprising determining that the trigger event has occurred responsive to a trigger signal received is above a threshold.

### Claim 20 (depends on 15)

The method of claim 15, further comprising tracking the sequence in which data was written to a number of groups of memory cells of a memory device based on:
a known size of each one of the number of groups of memory cells; and
a known size of the data received over the predefined period preceding the trigger event.