# US 12,181,959 B2 · Method and apparatus for fault prediction and management

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- Number: US 12,181,959 B2
- Document ID: US12181959B2
- Status: Granted
- Kind: B2
- Application number: 16/718,168
- Filed: 2019-12-17
- Published: 2021-06-17
- Granted: 2024-12-31
- Earliest claimed: 2019-12-17
- Assignees: Advanced Micro Devices, Inc.
- Applicants: Advanced Micro Devices, Inc.
- Inventors: Sudhanva Gurumurthi; Vilas K. Sridharan
- Web page: https://patentgrep.com/patent/US12181959B2

## CPC

- G06F 11/079: {Root cause analysis, i.e. error or fault diagnosis (in a hardware test environment G06F11/22; in a software test environment G06F11/36)}
- G06F 11/106: {Correcting systematically all correctable errors, i.e. scrubbing}
- G06F 11/0727: {in a storage system, e.g. in a DASD or network based storage system (drivers for digital recording or reproducing units G06F3/06; circuits for error detection or correction within digital recording or reproducing units G11B20/18; for distributed storage of data in networks, e.g. transport arrangements for network file system [NFS], storage area networks [SAN] or network attached storage [NAS], H04L67/1097)}
- G06F 11/073: {in a memory management context, e.g. virtual memory or cache management (memory management G06F12/00; testing of static memory units G11C29/00)}
- G06F 11/0751: {Error or fault detection not based on redundancy (power supply failures G06F1/30; network fault management H04L41/06)}
- G06F 11/1064: {in cache or content addressable memories}
- G06F 11/1068: {in sector programmable memories, e.g. flash disk (G06F11/1072 takes precedence)}
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)

## Abstract

A method and apparatus for predicting and managing a fault in memory includes detecting an error in data. The error is compared to one or more stored errors in a filter, and based upon the comparison, the error is predicted as a transient error or a permanent error for further action.

## Claims

### Claim 1

A method for predicting and managing a fault in memory, comprising:
detecting an error in data that is read from the memory, wherein the detecting an error in data includes detecting a physical address for the error in the data;
comparing the physical address to one or more stored errors using a filter, the comparing comprising applying a plurality of hash functions to the physical address to obtain a set of bit positions;
classifying the error as a permanent error based on whether a set of bit values at each bit position is equal to 1; and
updating a machine check architecture (MCA) to indicate that the physical address contains the permanent error in response to the error being classified as the permanent error, wherein the MCA includes a vector identifying a bit error of bits stored at the physical address.

### Claim 2 (depends on 1)

The method of claim 1, wherein the error in data is detected by reading an error in a cacheline.

### Claim 3 (depends on 1)

The method of claim 1, further comprising correcting the error.

### Claim 4 (depends on 3)

The method of claim 3, wherein correcting the error includes writing corrected data to a memory.

### Claim 5 (depends on 1)

The method of claim 1, further comprising setting a predicted permanent bit in the MCA to indicate the error is predicted permanent.

### Claim 6 (depends on 5)

The method of claim 5, further comprising sending information to an operating system (OS) by the MCA about the permanent error.

### Claim 7 (depends on 6)

The method of claim 6, wherein the information includes at least one of the predicted permanent bit, the physical address of the error, and a syndrome.

### Claim 8 (depends on 6)

The method of claim 6, further comprising performing, by the OS, a page retirement or a post-package repair (PPR).

### Claim 9 (depends on 1)

The method of claim 1, wherein the filter is a Bloom filter.

### Claim 10 (depends on 1)

The method of claim 1, wherein the error has not been previously recorded in the filter.

### Claim 11

An apparatus for predicting and managing a fault in a memory, comprising:
a filter;
a machine check architecture (MCA); and
a memory controller that is communicatively coupled with the memory, the filter and the MCA,
wherein the memory controller:
detects an error in data that is read from the memory, wherein the detecting an error in data includes detecting a physical address for the error in the data,
compares the physical address to one or more stored errors using the filter, the comparing comprising applying a plurality of hash functions to the physical address to obtain a set of bit positions,
classifies the error as a permanent error based on whether a set of bit values at each bit position is equal to 1, and
update the MCA to indicate that the physical address contains the permanent error in response to the error being classified as the permanent error, wherein the MCA includes a vector identifying a bit error of bits stored at the physical address.

### Claim 12 (depends on 11)

The apparatus of claim 11, wherein the error in the data is detected by reading an error in a cacheline.

### Claim 13 (depends on 11)

The apparatus of claim 11, further comprising the memory controller correcting the error.

### Claim 14 (depends on 13)

The apparatus of claim 13, wherein correcting the error includes the memory controller writing corrected data to the memory.

### Claim 15 (depends on 11)

The apparatus of claim 11, further comprising the memory controller setting a predicted permanent bit in the MCA to indicate the error is predicted permanent.

### Claim 16 (depends on 15)

The apparatus of claim 15, wherein the the memory controller further:
sends information to an operating system (OS) about the permanent error.

### Claim 17 (depends on 16)

The apparatus of claim 16, wherein the information includes at least one of the predicted permanent bit, the physical address of the error, and a syndrome.

### Claim 18 (depends on 16)

The apparatus of claim 16, further comprising performing, by the OS, a page retirement or a post-package repair (PPR).

### Claim 19 (depends on 11)

The apparatus of claim 11, wherein the error has not been previously recorded in the filter.

### Claim 20

A non-transitory computer-readable medium for predicting and managing a fault in memory, the non-transitory computer-readable medium having instructions recorded thereon, that when executed by a processor, cause the processor to perform operations including:
detecting an error in data that is read from the memory, wherein the detecting an error in data includes detecting a physical address for the error in the data;
comparing the physical address to one or more stored errors using a filter, the comparing comprising applying a plurality of hash functions to the physical address to obtain a set of bit positions;
classifying the error as a permanent error based on whether a set of bit values at each bit position is equal to 1; and
updating a machine check architecture (MCA) to indicate that the physical address contains the permanent error in response to the error being classified as the permanent error, wherein the MCA includes a vector identifying a bit error of bits stored at the physical address.

### Claim 21 (depends on 20)

The non-transitory computer-readable medium of claim 20, wherein the error has not been previously recorded in the filter.