# US 12,181,948 B2 · Programming power management circuits in a system > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,181,948 B2 - Document ID: US12181948B2 - Status: Granted - Kind: B2 - Application number: 17/936,083 - Filed: 2022-09-28 - Published: 2024-03-28 - Granted: 2024-12-31 - Earliest claimed: 2022-09-28 - Assignees: Micron Technology, Inc. - Applicants: Micron Technology, Inc. - Inventors: William A. Lendvay; Paul Zipp; Yoshihisa Fukushima; Mamoru Nagase; Tetsuya Shibata - Web page: https://patentgrep.com/patent/US12181948B2 ## CPC - G06F 1/3253: {Power saving in bus} - G11C 5/147: {Voltage reference generators, voltage or current regulators; Internally lowered supply levels; Compensation for voltage drops (G11C5/141 takes precedence)} - G06F 1/3275: {Power saving in memory, e.g. RAM, cache} - G11C 5/14: Power supply arrangements {, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels} - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) - G11C: STATIC STORES (semiconductor memory devices H10B) ## Abstract Methods, systems, and devices for programming power management circuits in a system are described. An apparatus may include a set of one or more power management circuits configured to provide one or more operating voltages for the apparatus. The apparatus may also include an interface coupled with a controller via a bus. The apparatus may include a first switching circuit configured to isolate the bus from the controller and to couple the bus with a second switching circuit. The second switching circuit may be configured to isolate the set of one or more power management circuits from the controller and to couple the set of one or more power management circuits with the first switching circuit. ## Claims ### Claim 1 An apparatus, comprising: a set of one or more power management circuits configured to provide one or more operating voltages for the apparatus; an interface coupled with a controller via a bus; a first switching circuit configured to isolate the bus from the controller and to couple the bus with a second switching circuit; the second switching circuit configured to isolate the set of one or more power management circuits from the controller and to couple the set of one or more power management circuits with the first switching circuit, the first switching circuit and the second switching circuit for programming the set of one or more power management circuits; and a second bus coupled with the controller and configured to communicate control signals to the set of one or more power management circuits, wherein the second switching circuit is configured to isolate the set of one or more power management circuits from the second bus. ### Claim 2 (depends on 1) The apparatus of claim 1, wherein the bus is configured to communicate programming signals to the set of one or more power management circuits via the first switching circuit and the second switching circuit. ### Claim 3 (depends on 1) The apparatus of claim 1, further comprising: a pin included in the interface and coupled with the first switching circuit and the second switching circuit. ### Claim 4 (depends on 3) The apparatus of claim 3, further comprising: a buffer gate coupled with the pin, the first switching circuit, and the second switching circuit and configured to isolate the pin from the first switching circuit and the second switching circuit. ### Claim 5 (depends on 4) The apparatus of claim 4, further comprising: a logic gate coupled with the set of one or more power management circuits and configured to receive an indication that the set of one or more power management circuits is successfully programmed, wherein the buffer gate is configured to isolate the pin from the first switching circuit and the second switching circuit based on an output signal from the logic gate. ### Claim 6 (depends on 3) The apparatus of claim 3, wherein the pin is coupled with a control terminal of the first switching circuit that is configured to control the first switching circuit, and wherein the pin is coupled with a control terminal of the second switching circuit that is configured to control the second switching circuit. ### Claim 7 (depends on 1) The apparatus of claim 1, further comprising: a power supply line configured to provide the one or more operating voltages from the set of one or more power management circuits to the controller. ### Claim 8 (depends on 1) The apparatus of claim 1, further comprising: a power supply line configured to provide the one or more operating voltages from the set of one or more power management circuits to a memory array controlled by the controller. ### Claim 9 A method, comprising: activating a first switching circuit to isolate a bus from a controller and to couple the bus with a second switching circuit; activating, based on activating the first switching circuit, the second switching circuit to isolate a set of one or more power management circuits from the controller and to couple the set of one or more power management circuits with the first switching circuit, wherein activating the second switching circuit isolates the set of one or more power management circuits from a second bus coupled with the controller and the second switching circuit; and programming the set of one or more power management circuits using signals communicated via the bus based on activating the first switching circuit and the second switching circuit. ### Claim 10 (depends on 9) The method of claim 9, wherein the bus is coupled with an interface, the method further comprising: applying a first voltage to a pin, of the interface, that is coupled with the first switching circuit and the second switching circuit, wherein the first switching circuit and the second switching circuit are activated based on applying the first voltage to the pin. ### Claim 11 (depends on 10) The method of claim 10, further comprising: isolating the pin from the first switching circuit and the second switching circuit based on determining that the set of one or more power management circuits has been successfully programmed. ### Claim 12 (depends on 10) The method of claim 10, further comprising: applying a second voltage to the pin based at least in part on determining that the set of one or more power management circuits has been successfully programmed; and activating, based at least in part on applying the second voltage, the first switching circuit to couple the bus with the controller and to isolate the bus from the second switching circuit. ### Claim 13 (depends on 12) The method of claim 12, further comprising: activating, based at least in part on applying the second voltage, the second switching circuit to couple the set of one or more power management circuits with the controller and to isolate the set of one or more power management circuits from the first switching circuit. ### Claim 14 (depends on 9) The method of claim 9, further comprising: providing a first operating voltage from a first power management circuit of the set of one or more power management circuits to a memory array. ### Claim 15 (depends on 14) The method of claim 14, further comprising: providing a second operating voltage from a second power management circuit of the set of one or more power management circuits to the controller. ### Claim 16 A method, comprising: activating a first switching circuit to isolate a bus from a controller and to couple the bus with a second switching circuit; activating, based on activating the first switching circuit, the second switching circuit to isolate a set of one or more power management circuits from the controller and to couple the set of one or more power management circuits with the first switching circuit; programming the set of one or more power management circuits using signals communicated via the bus based on activating the first switching circuit and the second switching circuit; activating, based on determining that the set of one or more power management circuits has been successfully programmed, the first switching circuit to isolate the set of one or more power management circuits from the bus and to couple the bus with the controller; and activating, based on determining that the set of one or more power management circuits has been successfully programmed, the second switching circuit to isolate the set of one or more power management circuits from the first switching circuit and to couple the second switching circuit with the controller. ### Claim 17 A system, comprising: a memory system; and a programming device coupled with the memory system and configured to cause the memory system to: activate a first switching circuit to isolate a bus from a controller and to couple the bus with a second switching circuit; activate, based on activating the first switching circuit, the second switching circuit to isolate a set of one or more power management circuits from the controller and to couple the set of one or more power management circuits with the first switching circuit, wherein activating the second switching circuit isolates the set of one or more power management circuits from a second bus coupled with the controller and the second switching circuit; and program the set of one or more power management circuits using signals communicated from the programming device to the set of one or more power management circuits via the bus based on activating the first switching circuit and the second switching circuit. ### Claim 18 (depends on 17) The system of claim 17, wherein the programming device is configured to: apply a first voltage to a pin of the memory system that is coupled with the first switching circuit and the second switching circuit, wherein the first switching circuit and the second switching circuit are activated based on applying the first voltage to the pin. ### Claim 19 (depends on 18) The system of claim 18, wherein the memory system is configured to: isolate the pin from the first switching circuit and the second switching circuit based on determining that the set of one or more power management circuits has been successfully programmed. ### Claim 20 (depends on 18) The system of claim 18, wherein the programming device is configured to: apply a second voltage to the pin based at least in part on determining that the set of one or more power management circuits has been successfully programmed; and wherein the memory system is configured to: activate, based at least in part on the second voltage, the first switching circuit to couple the bus with the controller and to isolate the bus from the second switching circuit. ### Claim 21 (depends on 20) The system of claim 20, wherein the memory system is further configured to: activate, based at least in part on the second voltage, the second switching circuit to couple the set of one or more power management circuits with the controller and to isolate the set of one or more power management circuits from the first switching circuit. ### Claim 22 (depends on 17) The system of claim 17, wherein the memory system is configured to: activate, based on determining that the set of one or more power management circuits has been successfully programmed, the first switching circuit to isolate the set of one or more power management circuits from the bus and to couple the bus with the controller.