# US 12,181,941 B2 · Adaptive on-chip digital power estimator

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- Number: US 12,181,941 B2
- Document ID: US12181941B2
- Status: Granted
- Kind: B2
- Application number: 17/902,423
- Filed: 2022-09-02
- Published: 2022-12-29
- Granted: 2024-12-31
- Earliest claimed: 2019-09-26
- Assignees: Apple Inc.
- Applicants: Apple Inc.
- Inventors: Laurent F. Chaouat; Saharsh Samir Oza; Hamza Saigol
- Web page: https://patentgrep.com/patent/US12181941B2

## CPC

- G06F 1/26: Power supply means, e.g. regulation thereof (for memories G11C)
- G06F 1/3243: {Power saving in microcontroller unit}
- G04F 10/005: {Time-to-digital converters [TDC] (analog-to-digital converters with intermediate conversion to time or phase H03M1/50, H03M1/60)}
- G06F 1/3206: Monitoring of events, devices or parameters that trigger a change in power modality
- G06F 11/3024: {where the computing system component is a central processing unit [CPU]}
- G06F 11/3062: {where the monitored property is the power consumption (power management in a computing system G06F1/3203)}
- G06F 1/3225: of memory devices
- G06F 1/324: by lowering clock frequency
- G06F 1/3296: by lowering the supply or operating voltage
- G06F 2201/86: Event-based monitoring
- G06F 2201/88: Monitoring involving counting
- Y02D 10/00: Energy efficient computing, e.g. low power processors, power management or thermal management
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)
- G04F: TIME-INTERVAL MEASURING (measuring pulse characteristics G01R, e.g. G01R29/02; in radar or like systems G01S)
- Y02D: CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE

## Abstract

Systems, apparatuses, and methods for implementing a dynamic power estimation (DPE) unit that adapts weights in real-time are described. A system includes a processor, a DPE unit, and a power management unit (PMU). The DPE unit generates a power consumption estimate for the processor by multiplying a plurality of weights by a plurality of counter values, with each weight multiplied by a corresponding counter. The DPE unit calculates the sum of the products of the plurality of weights and plurality of counters. The accumulated sum is used as an estimate of the processor's power consumption. On a periodic basis, the estimate is compared to a current sense value to measure the error. If the error is greater than a threshold, then an on-chip learning algorithm dynamically adjust the weights. The PMU uses the power consumption estimates to keep the processor within a thermal envelope.

## Claims

### Claim 1

A system, comprising:
dynamic power estimation circuitry configured to:
generate a first estimate of power consumption of a processing circuit using one or more weights;
responsive to the first estimate differing from a measured power consumption of the processing circuit by at least a threshold amount:
modify the one or more weights to generate one or more modified weights; and
generate a second estimate of power consumption of the processing circuit using the one or more modified weights; and
power management circuitry configured to adjust a power performance state of the processing circuit based on a power consumption estimate generated by the dynamic power estimation circuitry.

### Claim 2 (depends on 1)

The system as recited in claim 1, wherein responsive to the first estimate differing from the measured power consumption of the processing circuit by at least the threshold amount, the power consumption estimate generated by the dynamic power estimation circuitry is the second estimate of power consumption.

### Claim 3 (depends on 1)

The system as recited in claim 1, wherein responsive to the first estimate not differing from the measured power consumption of the processing circuit by at least the threshold amount, the power consumption estimate generated by the dynamic power estimation circuitry is the first estimate of power consumption.

### Claim 4 (depends on 1)

The system as recited in claim 1, wherein the dynamic power estimation circuitry is configured to adjust the one or more weights such that a difference between the second estimate and the measured power consumption is less than a difference between the first estimate and the measured power consumption.

### Claim 5 (depends on 1)

The system as recited in claim 1, wherein the dynamic power estimation circuitry is configured to generate power consumption estimates based at least in part on one or more events occurring within the processing circuit.

### Claim 6 (depends on 5)

The system as recited in claim 5, wherein the one or more events are tracked by one or more counters whose values are weighted by the one or more weights.

### Claim 7 (depends on 1)

The system as recited in claim 1, wherein the dynamic power estimation circuitry is configured to adjust the one or more weights based on a stochastic gradient descent algorithm.

### Claim 8 (depends on 7)

The system as recited in claim 7, wherein the dynamic power estimation circuitry is configured to compare an estimate of power consumption of the processing circuit to measured power consumption of the processing circuit on a periodic basis.

### Claim 9

A method, comprising:
generating a first estimate of power consumption of a processing circuit using one or more weights;
responsive to determining the first estimate differs from a measured power consumption of the processing circuit by at least a threshold amount:
modifying the one or more weights to generate one or more modified weights; and
generating a second estimate of power consumption of the processing circuit using the one or more modified weights; and
adjusting a power performance state of the processing circuit based on one of the first estimate and the second estimate.

### Claim 10 (depends on 9)

The method as recited in claim 9, comprising adjusting the power performance state of the processing circuit based on the second estimate, responsive to the first estimate differing from the measured power consumption of the processing circuit by at least the threshold amount.

### Claim 11 (depends on 9)

The method as recited in claim 9, comprising determining the measured power consumption based at least in part on a coulomb counter.

### Claim 12 (depends on 9)

The method as recited in claim 9, further comprising adjusting the one or more weights such that a difference between the second estimate and the measured power consumption is less than a difference between the first estimate and the measured power consumption.

### Claim 13 (depends on 9)

The method as recited in claim 9, further comprising generating power consumption estimates based at least in part on one or more detected events occurring within the processing circuit.

### Claim 14 (depends on 13)

The method as recited in claim 13, further comprising tracking the one or more events using one or more counters whose values are weighted by the one or more weights.

### Claim 15 (depends on 9)

The method as recited in claim 9, further comprising adjusting the one or more weights based on a stochastic gradient descent algorithm.

### Claim 16 (depends on 15)

The method as recited in claim 15, further comprising comparing an estimate of power consumption of the processing circuit to measured power consumption of the processing circuit on a periodic basis.

### Claim 17

A system comprising:
processing circuitry;
dynamic power estimation circuitry configured to perform a comparison of an estimate of power consumption of the processing circuitry to measured power consumption of the processing circuitry; and
power management circuitry configured to adjust a power performance state of the processing circuit in dependence on the comparison.

### Claim 18 (depends on 17)

The system as recited in claim 17, wherein responsive to the comparison indicating the measured power consumption differs from the estimate by at least a threshold amount, the dynamic power estimation circuitry is configured to generate a modified estimate of power consumption by the processing circuitry.

### Claim 19 (depends on 18)

The system as recited in claim 18, wherein the power management circuitry is configured to adjust the power performance state based on the modified estimate of power consumption.

### Claim 20 (depends on 17)

The system as recited in claim 17, wherein the dynamic power estimation circuitry is configured to generate a new estimate of power consumption responsive to an original estimate of power consumption differing from measure power consumption of the processing circuitry by at least a threshold amount.