Memory device and method of operating the memory device
AssigneeSK hynix Inc.
InventorsHye Lyoung Lee, Tae Un Youn, Kwang Min Lim
Life of this patent
Estimating the term…
Abstract
The present technology relates to a memory device and a method of operating the memory device. The memory device includes a memory block including a plurality of memory cells corresponding to a plurality of word line groups, a source line driver configured to apply an erase voltage to a source line of the memory block during an erase operation, a voltage generation circuit configured to apply an operation voltage increasing from a first operation voltage to a second operation voltage to the plurality of word line groups during the erase operation, and a control logic configured to control the source line driver and the voltage generation circuit to perform a suspend operation of stopping the erase operation.
Claims28
A memory device comprising:
- a memory block including a plurality of memory cells corresponding to a plurality of word line groups;
- a source line driver configured to apply an erase voltage to a source line of the memory block during an erase operation;
- a voltage generation circuit configured to apply an operation voltage increasing from a first operation voltage to a second operation voltage to the plurality of word line groups during the erase operation;
- and
- a control logic configured to control the source line driver and the voltage generation circuit to perform a suspend operation of stopping the erase operation in response to a suspend command, and configured to set the number of remaining erase pulses of the erase operation and a rising time point when the operation voltage increases from the first operation voltage to the second operation voltage, based on the number of times the suspend operation is performed, for each of the plurality of word line groups.
A method of operating a memory device, the method comprising:
- performing an erase operation on a memory block including a plurality of memory cells corresponding to a plurality of word line groups;
- performing a suspend operation of stopping the erase operation in response to a suspend command received during the erase operation;
- setting the number of remaining erase pulses based on the number of times the suspend operation is performed during the erase operation;
- setting a rising time point of an operation voltage applied to the word lines of the selected memory block for each of the plurality of word line groups during the erase operation based on the number of times the suspend operation is performed and an adjustment ratio of each of the plurality of word line groups;
- and
- performing a resume operation of resuming the stopped erase operation, performing an erase pulse application loop as many times as the number of remaining erase pulses during the resume operation, and increasing the operation voltage applied to the word lines from a first operation voltage to a second operation voltage at the set rising time point of the operation voltage.
A memory device comprising:
- a memory block including a plurality of memory cells corresponding to a plurality of word line groups;
- a source line driver configured to apply an erase voltage to a source line of the memory block during an erase operation;
- a voltage generation circuit configured to apply an operation voltage increasing from a first operation voltage to a second operation voltage to the plurality of word line groups during the erase operation;
- and
- a control logic configured to control the source line driver and the voltage generation circuit to perform a suspend operation of stopping the erase operation in response to a suspend command, and configured to set the number of remaining erase pulses of the erase operation for each of the plurality of word line groups based on a time point when the suspend operation is performed,
- wherein when the time point when the suspend operation is performed corresponds to a partial period, the control logic calculates the number of subtractions using an adjustment ratio corresponding to the partial period and the number of times the suspend operation is performed.
A method of operating a memory device, the method comprising:
- performing an erase operation on a memory block including a plurality of memory cells corresponding to a plurality of word line groups;
- performing a suspend operation of stopping the erase operation in response to a suspend command received during the erase operation;
- setting the number of remaining erase pulses based on a time point when the suspend operation performed during the erase operation is performed;
- and
- performing a resume operation of resuming the stopped erase operation, and performing an erase pulse application loop as many times as the set number of remaining erase pulses,
- wherein setting the number of remaining erase pulses comprises:
- calculating the number of subtractions using an adjustment ratio corresponding to a partial period and the number of times the suspend operation is performed, when the time point when the suspend operation is performed corresponds to the partial period;
- and
- setting the number of remaining erase pulses by subtracting the calculated number of subtractions from the number of erase pulse application loops which are not performed by the suspend operation during the erase operation.
A memory device comprising:
- a memory block including a plurality of memory cells corresponding to a plurality of word line groups;
- a source line driver configured to apply an erase voltage to a source line of the memory block during an erase operation;
- a voltage generation circuit configured to apply an operation voltage increasing from a first operation voltage to a second operation voltage to the plurality of word line groups during the erase operation;
- and
- a control logic configured to control the source line driver and the voltage generation circuit to perform a suspend operation of stopping the erase operation in response to a suspend command, and configured to set a rising time point when the operation voltage increases from the first operation voltage to the second operation voltage for each of the plurality of word line groups, based on at least one of a time point when the suspend operation is performed or the number of times the suspend operation is performed.
A method of operating a memory device, the method comprising:
- performing an erase operation on a memory block including a plurality of memory cells corresponding to a plurality of word line groups;
- performing a suspend operation of stopping the erase operation in response to a suspend command received during the erase operation;
- setting the number of remaining erase pulses based on the number of times the suspend operation is performed during the erase operation;
- setting a rising time point of an operation voltage applied to word lines of the selected memory block for each of the plurality of word line groups during the erase operation based on at least one of the time point when the suspend operation is performed or the number of times the suspend operation is performed;
- and
- performing a resume operation of resuming the stopped erase operation, performing an erase pulse application loop as many times as the number of remaining erase pulses during the resume operation, and increasing the operation voltage applied to the word lines from a first operation voltage to a second operation voltage at the set rising time point of the operation voltage.
Dependencies are inferred from the claim text.