Hierarchical mantissa bit length selection for hardware implementation of deep neural network

A computer-implemented method of selecting a fixed point number format for representing values input to, and/or output from, a plurality of layers of a Deep Neural Network (DNN) for use in configuring a hardware implementation of the DNN, the method comprising:

• receiving an instantiation of the DNN configured to represent the values of each of the plurality of layers using one or more initial fixed point number formats for that layer, each initial fixed point number format comprising an exponent and a mantissa bit length;
• forming a plurality of disjoint subsets from the plurality of layers;
• for each subset of the plurality of subsets, iteratively adjusting the fixed point number formats for the layers in the subset to fixed point number formats with a next lowest mantissa bit length until the output error of the instantiation of the DNN exceeds an error threshold;
• in response to determining that the subsets comprise greater than a lower threshold number of layers, forming a higher number of disjoint subsets than the plurality of disjoint subsets from the plurality of layers and repeating the iterative adjusting;
• and
• in response to determining that the subsets comprise less than or equal to the lower threshold number of layers, outputting the fixed point number formats for the plurality of layers.