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US 12,170,313 B2Granted
Heterojunction bipolar transistor with buried trap rich isolation region
AssigneeGlobalFoundries U.S. Inc.
InventorsVibhor Jain, Anthony K. Stamper, John J. Ellis-Monaghan, Steven M. Shank, Rajendran Krishnasamy
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Abstract
The present disclosure relates to semiconductor structures and, more particularly, to heterojunction bipolar transistors (HBTs) with a buried trap rich region and methods of manufacture. The structure includes: a trap rich isolation region embedded within the bulk substrate; and a heterojunction bipolar transistor above the trap rich isolation region, with its sub-collector region separated by the trap rich isolation region by a layer of the bulk substrate.
Claims20
A structure comprising:
- an isolation region comprising polycrystalline semiconductor material and embedded within a single crystalline substrate;
- a heterojunction bipolar transistor above the isolation region;
- and
- a deep trench isolation structure isolating the heterojunction bipolar transistor and contacting the isolation region;
- shallow trench isolation structures within a region defined by the deep trench isolation structure;
- and
- a sub-collector below the shallow trench isolation structures, above the isolation region and extending to and contacting the deep trench isolation structure.
4 more elements
A structure comprising:
- an isolation region comprising polycrystalline semiconductor material and embedded within a single crystalline substrate;
- a heterojunction bipolar transistor above the isolation region;
- and
- a deep trench isolation structure isolating the heterojunction bipolar transistor and contacting the isolation region;
- and
- shallow trench isolation structures over the sub-collector region, wherein
- the heterojunction bipolar transistor includes a sub-collector region in the single crystalline substrate, and the heterojunction bipolar transistor is vertically separated from the isolation region by the single crystalline substrate, and
- the sub-collector region is vertically below and does not contact the shallow trench isolation structures.
5 more elements
A structure comprising:
- an isolation region comprising polycrystalline semiconductor material and embedded within a single crystalline substrate;
- a heterojunction bipolar transistor above the isolation region;
- a deep trench isolation structure isolating the heterojunction bipolar transistor and contacting the isolation region;
- and
- a device region adjacent to the heterojunction bipolar transistor, the device region including shallow trench isolation structures which contact a trap rich isolation region under the shallow trench isolation structures, wherein the additional trap rich isolation region under and in contact with the shallow trench isolation structures is separated from and does not contact the isolation region.
2 more elements
Dependencies are inferred from the claim text.