High-performance input-output devices supporting scalable virtualization

A method comprising:

• storing, in one or more base address registers (BARs), one or more base addresses of one or more address ranges to be mapped to a plurality of memory-mapped input/output (MMIO) registers, including a first MMIO register to be accessed for a direct-path operation and a second MMIO register to be accessed for an intercepted-path operation;
• performing, by hardware, guest physical address to host physical address translation for read and write access to the first MMIO register but only for read access to the second MMIO register;
• mapping access for the direct-path operation to an interface for a virtual device, the interface to be composed of one or more of a plurality of resources and to be identified by an identifier;
• and
• intercepting access for the intercepted-path operation for emulation.

A non-transitory machine-readable medium storing instructions, which when executed by a machine, cause the machine to perform a method comprising:

• storing, in one or more base address registers (BARs), one or more base addresses of one or more address ranges to be mapped to a plurality of memory-mapped input/output (MMIO) registers, including a first MMIO register to be accessed for a direct-path operation and a second MMIO register to be accessed for an intercepted-path operation;
• performing, by hardware, guest physical address to host physical address translation for read and write access to the first MMIO register but only for read access to the second MMIO register;
• mapping access for the direct-path operation to an interface for a virtual device, the interface to be composed of one or more of a plurality of resources and to be identified by an identifier;
• and
• intercepting access for the intercepted-path operation for emulation.