Device-to-device link training
AssigneeIntel Corporation
InventorKent C. Lusted
Life of this patent
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Abstract
Examples described herein relate to a network interface comprising physical medium dependent (PMD) circuitry, the PMD circuitry to during link training of at least one lane consistent with IEEE 802.3, exit to TIME_OUT state during TRAIN_LOCAL state based on consideration of expiration of a wait timer, loss of local_tf_lock state, and loss of remote_tf_lock state. In some examples, during link training for at least one lane consistent with IEEE 802.3, the PMD circuitry is to exit to TIME_OUT state during TRAIN_REMOTE state based on consideration of expiration of a wait timer, loss of local_tf_lock state, and loss of remote_tf_lock state. In some examples, link training consistent with IEEE 802.3 comprises performance of the PMD control function in Section 162.8.11 of IEEE 802.3ck.
Claims30
An apparatus comprising:
- a network interface device comprising:
- a media access control (MAC) circuitry;
- a direct memory access (DMA) circuitry;
- and
- a physical layer interface (PHY) comprising:
- circuitry to:
- during link training of at least one lane with a remote link partner:
- change from a TRAIN_LOCAL state to a TIMEOUT state based at least on expiration of a wait time,
- enter a state based at least on loss of local_tf_lock state or loss of remote_tf_lock state, and
- exit from the TIMEOUT state to a TRAINING_FAILED state based at least on a holdoff_timer_done state.
An apparatus comprising:
- a switch comprising:
- circuitry to:
- during link training of at least one lane with a remote link partner:
- change from a TRAIN_LOCAL state to a TIMEOUT state based at least on expiration of a wait time,
- enter a state based at least on loss of local_tf_lock state or loss of remote_tf_lock state, and
- exit from the TIMEOUT state to a TRAINING_FAILED state based at least on a holdoff_timer_done state.
An apparatus comprising:
- Ethernet physical layer transceiver (PHY) circuitry for use in frame communication with a remote link partner, the Ethernet PHY circuitry comprising:
- circuitry to:
- during link training of at least one lane with a remote link partner:
- change from a TRAIN_LOCAL state to a TIMEOUT state based at least on expiration of a wait time,
- enter a state based at least on loss of local_tf_lock state or loss of remote_tf_lock state, and
- exit from the TIMEOUT state to a TRAINING_FAILED state based at least on a holdoff_timer_done state.
Dependencies are inferred from the claim text.