AD converter and semiconductor device including the same
AssigneeRenesas Electronics Corporation
InventorMasaaki Usui
Life of this patent
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Abstract
An AD converter includes a plurality of analog input terminals, a reference signal generation circuit that generates an analog reference signal, a sample-and-hold unit that includes a plurality of sample-and-hold circuits sampling the analog reference signal or one of analog input signals from the analog input terminals, a control unit that controls the sample-and-hold unit, and a conversion unit that converts an output signal from the sample-and-hold unit into a digital signal. The control unit controls the sample-and-hold unit to perform the output operation for analog input signal and the sampling operation for the analog reference signal.
Claims7
An analog-to-digital (AD) converter comprising:
- a plurality of analog input terminals;
- a reference signal generation circuit generating an analog reference signal;
- a sample-and-hold unit including a plurality of sample-and-hold circuits, each of the sample-and-hold circuits sampling the analog reference signal or one of analog input signals inputted to the analog input terminals;
- a controller controlling the sample-and-hold unit;
- a conversion core converting an output signal from the sample-and-hold unit into a digital signal;
- a conversion result storage register storing a conversion result outputted from the conversion core;
- and
- a failure diagnostic processor comparing a conversion result of the analog reference signal stored in the conversion result storage register with an expected value,
- wherein the controller controls the sample-and-hold unit to perform an output operation of the analog input signal and a sampling operation of the analog reference signal in parallel,
- wherein the conversion result storage register stores an identification information for identifying a path of the analog reference signal in the sample-and-hold circuit with the conversion result of the analog reference signal,
- wherein the failure diagnostic processor, when the failure diagnostic processor detects a failure based on the compared conversion result of the analog reference signal, transfers the identification information corresponding to the analog reference signal which the failure is detected to the controller, and
- wherein the controller controls the sample-and-hold unit so that the analog reference signal is not sampled and held by the sample-and-hold circuit identified by the identification information.
Dependencies are inferred from the claim text.