TVF transition coverage with self-test and production-test time reduction

An integrated circuit comprising:

• a control circuit configured to provide a first scan enable signal and a second scan enable signal;
• a triple-voting flop comprising a first scan flip-flop, a second scan flip-flop, and a third scan flip-flop, an output of the first scan flip-flop coupled to a scan input of the second scan flip-flop, and an output of the second scan flip-flop coupled to a scan input of the third scan flip-flop;
• a scan chain configured to receive the first scan enable signal, the second scan enable signal, and a third scan enable signal, the scan chain comprising the first scan flip-flop, the second scan flip-flop, and the third scan flip-flop, the first scan flip-flop configured to receive the first scan enable signal, the second scan flip-flop configured to receive the third scan enable signal, and the third scan flip-flop configured to receive the second scan enable signal;
• and
• a scan controller coupled to the control circuit and the triple-voting flop, the scan controller configured to control the first scan enable signal, the second scan enable signal, and the third scan enable signal.

A method for testing a triple-voting flop in a scan chain of an integrated circuit, the method comprising:

• providing, by a control circuit of the integrated circuit, a first scan enable signal and a second scan enable signal;
• receiving, by a first scan flip-flop of the triple-voting flop, the first scan enable signal;
• receiving, by a second scan flip-flop of the triple-voting flop, a third scan enable signal, an output of the first scan flip-flop coupled to a scan input of the second scan flip-flop;
• receiving, by a third scan flip-flop of the triple-voting flop, the second scan enable signal, an output of the second scan flip-flop coupled to a scan input of the third scan flip-flop;
• providing a scan input signal to the first scan flip-flop, the second scan flip-flop, and the third scan flip-flop;
• controlling, by a scan controller of the integrated circuit, the first scan enable signal, the second scan enable signal, and the third scan enable signal;
• receiving, at an output of the triple-voting flop, a scan output signal;
• and
• determining whether the triple-voting flop suffers from a fault based on the scan output signal and the controlling of the first scan enable signal, the second scan enable signal, and the third scan enable signal.