Method, apparatus and system providing a storage gate pixel with high dynamic range

At least one pixel circuit, comprising:

• a floating diffusion node;
• at least one photosensor;
• a first series of transistors coupling a first photosensor of the at least one photosensor to the floating diffusion node;
• a first storage region coupled to the floating diffusion node via at least one transistor of the first series of transistors;
• a first transistor coupled to the first photosensor and separate from the first series of transistors, wherein the first transistor is configured such that the first photosensor is reset at least when the first transistor is activated while a transistor of the at least one transistor of the first series of transistors is off;
• a second series of transistors different from the first series of transistors;
• and
• a second storage region coupled to the floating diffusion node via at least one transistor of the second series of transistors, wherein the at least one pixel circuit is configured to pulse a first signal applied to a gate of the first transistor such that (a) the first transistor is activated and the first photosensor is reset and (b) the pulse of the first signal ends before a second signal applied to a gate of the transistor of the at least one transistor of the first series of transistors is asserted.

An imager circuit, comprising:

• at least one pixel circuit including a floating diffusion region, a first photosensor coupled to the floating diffusion region via a first series of transistors, a first storage region coupled to the first photosensor, wherein the first storage region is positioned between a first transistor and a second transistor of the first series of transistors, and wherein the first transistor is directly coupled to the first photosensor, a third transistor directly coupled to the first photosensor and separate from the first series of transistors,
• a second photosensor different from the first photosensor and coupled to the floating diffusion region via a second series of transistors different from the first series of transistors,
• a second storage region coupled to the second photosensor, the second storage region positioned between a fourth transistor and a fifth transistor of the second series of transistors;
• and
• a control circuit configured to pulse a first signal applied to a gate of the third transistor such that (a) the third transistor is activated, (b) the first photosensor is reset, and (c) the pulse of the first signal ends before a second signal applied to a gate of the first transistor is asserted to activate the first transistor.