Randomly jittered under-sampling for efficient data acquisition and analysis in digital metering, GFCI, AFCI, and digital signal processing applications

A method of analyzing a current or voltage signal, comprising:

• providing, at a sense circuit, a current or voltage signal from an AC mains to an analog-to-digital converter (ADC);
• providing, at a randomly jittered sampling module coupled to the ADC, a trigger input to the ADC, the trigger input causing the ADC to acquire a sample of the current or voltage signal provided by the sense circuit, wherein providing the trigger input to the ADC comprises:
• incrementing, at a timer included in the randomly jittered sampling module, a counter value of a counter from a predefined reset value to a predefined update event value, the timer operable to output an update event signal when the counter value reaches the update event value;
• providing, at a random number generator included in the randomly jittered sampling module and coupled to the timer, a random number to the timer upon receipt of the update event signal from the timer;
• comparing, at the timer included in the randomly jittered sampling module, the random number from the random number generator to the counter value in the counter;
• and
• providing, at the timer included in the randomly jittered sampling module, the trigger input to the ADC if the random number matches the counter value, such that the trigger input to the ADC has an aperiodicity that is randomly generated.

A non-transitory computer-readable medium having computer-readable instructions stored thereon for analyzing a current or voltage signal, the computer-readable instructions, when executed by a controller, cause the controller to perform a process that:

• receives a current or voltage signal from an AC mains at an analog-to-digital converter (ADC);
• and
• provides a trigger input to the ADC, the trigger input causing the ADC to acquire a sample of the current or voltage signal provided by the sense circuit, wherein providing the trigger input to the ADC comprises:
• increments a counter value of a counter from a predefined reset value to a predefined update event value;
• outputs an update event signal when the counter value reaches the update event value;
• generates a random number in response to the update event signal;
• compares the random number to the counter value of the counter;
• and
• provides the trigger input to the ADC if the random number matches the counter value, such that the trigger input to the ADC has an aperiodicity that is randomly generated.