Encoding and decoding of data using generalized LDPC codes

A memory system comprising:

• a nonvolatile memory (NVM);
• a controller configured to read data from the NVM;
• and
• an accelerator comprising an iterative decoder, the accelerator being connected to the controller and configured to:
• apply the iterative decoder to the read data through the controller and determine whether the iterative decoder is oscillating;
• determine a total number of rows in first data the iterative decoder attempted to correct to generate second data;
• estimate residual error rows among the total number that no longer have an error after the attempt;
• determine second visible error rows in the second data of the iterative decoder that continue to have an error by permuting indices of the residual error rows according to a permutation;
• determine whether zero or more first hidden error rows are present in the first data from the second visible error rows;
• and
• correct the first data using the first visible error rows and the determined number of first hidden error rows when it is determined that the iterative decoder is oscillating, wherein each hidden error row has an error and is a valid Hamming codeword.

A nonvolatile memory (NVM) device comprising:

• a nonvolatile memory (NVM) array;
• an iterative decoder;
• and
• a logic circuit configured to:
• apply the iterative decoder to decode data read from the NVM array;
• determine a total number of rows in first data the iterative decoder attempted to correct;
• estimate first visible error rows among the total number that continue to have an error after the attempt;
• estimate residual error rows among the total number that no longer have an error after the attempt;
• determine second visible error rows in second data of the iterative decoder that continue to have an error by permuting indices of the residual error rows according to a permutation;
• and
• correct the first data using the first visible error rows.