Methods and apparatus for voltage buffering
AssigneeTexas Instruments Incorporated
InventorsSiraj Akhtar, Swaminathan Sankaran
Life of this patent
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Abstract
In an example apparatus, a first transistor has a base terminal, a first current terminal and a second current terminal. The base terminal is coupled to an input voltage node. A second transistor has a control terminal, a third current terminal and a fourth current terminal. The third current terminal is coupled to the second current terminal. The fourth current terminal is coupled to a first resistor. A second resistor is coupled to the control terminal. An inductor is coupled between the first resistor and a ground terminal.
Claims19
An apparatus, comprising:
- a voltage follower circuit having a voltage follower input, a power terminal, and a voltage follower output, the voltage follower circuit including a first transistor coupled between the power terminal and the voltage follower output, the first transistor including a bipolar junction transistor BJT) and having a first control terminal coupled to the voltage follower input;
- an inductor having first and second inductor terminals, the first inductor terminal coupled to a ground terminal;
- and
- a current source coupled between the voltage follower output and the second inductor terminal, the current source including a second transistor, the second transistor including a field effect transistor (FET) and having a second control terminal coupled to a bias input.
An apparatus, comprising:
- a voltage follower circuit having a voltage follower input, a power terminal, and a voltage follower output, the voltage follower circuit including a first transistor coupled between the power terminal and the voltage follower output, the first transistor including a bipolar junction transistor (BJT) and having a first control terminal coupled to the voltage follower input;
- a current source coupled between the voltage follower output and a ground terminal, the current source including a second transistor, the second transistor including a field effect transistor (FET) and having a second control terminal;
- and
- a resistor coupled between a bias input and the second control terminal.
An apparatus, comprising:
- a first voltage follower circuit having a first voltage follower input, a power terminal, and a first voltage follower output, the first voltage follower circuit including a first transistor coupled between the power terminal and the first voltage follower output, the first transistor including a bipolar junction transistor (BJT) and having a first control terminal coupled to the first voltage follower input;
- a first current source coupled between the first voltage follower output and a ground terminal, the first current source including a second transistor, the second transistor including a field effect transistor (FET) and having a second control terminal;
- a second voltage follower circuit having a second voltage follower input, the power terminal, and a second voltage follower output, the second voltage follower circuit including a third transistor coupled between the power terminal and the second voltage follower output, the third transistor including a BJT and having a third control terminal coupled to the second voltage follower input;
- a second current source coupled between the second voltage follower output and the ground terminal, the second current source including a fourth transistor, the fourth transistor including a FET and having a fourth control terminal;
- a first resistor coupled between a bias input and the second control terminal;
- and
- a second resistor coupled between the bias input and the fourth control terminal.
Dependencies are inferred from the claim text.