# US 12,120,931 B2 · Display apparatus > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,120,931 B2 - Document ID: US12120931B2 - Status: Granted - Kind: B2 - Application number: 17/228,400 - Filed: 2021-04-12 - Published: 2021-12-23 - Granted: 2024-10-15 - Earliest claimed: 2020-06-18 - Assignees: Samsung Display Co., Ltd. - Applicants: Samsung Display Co., Ltd. - Inventors: Nuree Um; Mihae Kim; Minjeong Kim; Hyungjun Park; Junyong An - Web page: https://patentgrep.com/patent/US12120931B2 ## CPC - G09G 3/3233: with pixel circuitry controlling the current through the light-emitting element - H10K 59/131: Interconnections, e.g. wiring lines or terminals - G09G 3/3258: with pixel circuitry controlling the voltage across the light-emitting element - H10D 86/441: {Interconnections, e.g. scanning lines} - H10D 86/60: wherein the TFTs are in active matrices - H10K 59/1213: {the pixel elements being TFTs} - H10K 59/1216: {the pixel elements being capacitors} - G09G 2300/0426: Layout of electrodes and connections - G09G 2300/0819: used for counteracting undesired variations, e.g. feedback or autozeroing - G09G 2300/0842: forming a memory circuit, e.g. a dynamic memory with one capacitor - G09G 2300/0861: with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes - G09G 2320/0214: with crosstalk due to leakage current of pixel switch in active matrix panels - H10D 86/423: {comprising semiconductor materials not belonging to the Group IV, e.g. InGaZnO} - H10D 86/481: {integrated with passive devices, e.g. auxiliary capacitors} - G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00) - H10K: ORGANIC ELECTRIC SOLID-STATE DEVICES - H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES ## Abstract A display apparatus includes: a first pixel circuit on the substrate and including a first driving thin-film transistor and a first storage capacitor electrically connected to the first driving thin-film transistor; a second pixel circuit adjacent to the first pixel circuit and including a second driving thin-film transistor and a second storage capacitor electrically connected to the second driving thin-film transistor; a first initialization voltage line electrically connected to the first pixel circuit and the second pixel circuit; a second initialization voltage line electrically connected to the first initialization voltage line; and a driving voltage line between the first pixel circuit and the second pixel circuit, wherein a channel area of the first driving thin-film transistor or a channel area of the second driving thin-film transistor is between the second initialization voltage line and the driving voltage line. ## Claims ### Claim 1 A display apparatus comprising: a substrate having a display area and a non-display area outside the display area, the display area being an area in which light is emitted; a first pixel circuit in the display area and including a first driving thin-film transistor and a first storage capacitor electrically connected to the first driving thin-film transistor; a second pixel circuit adjacent to the first pixel circuit and including a second driving thin-film transistor and a second storage capacitor electrically connected to the second driving thin-film transistor; a first initialization voltage line electrically connected to the first pixel circuit and the second pixel circuit and extending in a first direction; a second initialization voltage line electrically connected to the first initialization voltage line and extending in a second direction crossing the first direction and crossing over the first initialization voltage line in the display area to form a mesh structure, the mesh structure overlapping the area in which light is emitted when viewed in a plan view; and a driving voltage line extending in the second direction between the first pixel circuit and the second pixel circuit, wherein a channel area of the first driving thin-film transistor in the first pixel circuit in the display area of the substrate or a channel area of the second driving thin-film transistor in the second pixel circuit in the display area of the substrate is between the second initialization voltage line and the driving voltage line when viewing the substrate in the plan view. ### Claim 2 (depends on 1) The display apparatus of claim 1, wherein the first pixel circuit includes a first operation control thin-film transistor electrically connected to the driving voltage line, the second pixel circuit includes a second operation control thin-film transistor electrically connected to the driving voltage line, and the first operation control thin-film transistor and the second operation control thin-film transistor are asymmetric with respect to a virtual axis crossing between the first pixel circuit and the second pixel circuit. ### Claim 3 (depends on 2) The display apparatus of claim 2, wherein a semiconductor layer of the first operation control thin-film transistor is electrically connected to the driving voltage line through a first connection electrode. ### Claim 4 (depends on 3) The display apparatus of claim 3, wherein the first connection electrode includes: a 1-1st connection electrode corresponding to a portion of any one of electrodes of the first storage capacitor and contacting the driving voltage line; and a 1-2nd connection electrode contacting the 1-1st connection electrode and the semiconductor layer of the first operation control thin-film transistor. ### Claim 5 (depends on 1) The display apparatus of claim 1, wherein the first pixel circuit includes a first compensation thin-film transistor electrically connected to the first driving thin-film transistor, and a portion of a semiconductor layer of the first compensation thin-film transistor overlaps a shield electrode electrically connected to the driving voltage line. ### Claim 6 (depends on 5) The display apparatus of claim 5, wherein the second pixel circuit includes a second compensation thin-film transistor electrically connected to the second driving thin-film transistor, and a portion of a semiconductor layer of the second compensation thin-film transistor overlaps a shield electrode electrically connected to the second initialization voltage line. ### Claim 7 (depends on 1) The display apparatus of claim 1, wherein the second initialization voltage line is on the same layer as the driving voltage line. ### Claim 8 (depends on 1) The display apparatus of claim 1, wherein the second initialization voltage line is on a layer above the first initialization voltage line. ### Claim 9 (depends on 8) The display apparatus of claim 8, wherein the second initialization voltage line is electrically connected to the first initialization voltage line through a second connection electrode being integral with the second initialization voltage line. ### Claim 10 (depends on 9) The display apparatus of claim 9, wherein the first pixel circuit includes a first initialization thin-film transistor electrically connected to the first initialization voltage line, and the second connection electrode includes: a 2-1st connection electrode overlapping a portion of the first initialization voltage line and electrically connecting the first initialization voltage line with the second initialization voltage line; and a 2-2nd connection electrode extending from the 2-1st connection electrode and electrically connecting the first initialization voltage line with a semiconductor layer of the first initialization thin-film transistor. ### Claim 11 A display apparatus comprising: a substrate having a display area and a non-display area outside the display area, the display area being an area in which light is emitted; a first pixel circuit in the display area and including a first driving thin-film transistor and a first storage capacitor electrically connected to the first driving thin-film transistor; a second pixel circuit adjacent to the first pixel circuit and including a second driving thin-film transistor and a second storage capacitor electrically connected to the second driving thin-film transistor; a first initialization voltage line electrically connected to the first pixel circuit and the second pixel circuit and extending in a first direction; a second initialization voltage line electrically connected to the first initialization voltage line and extending in a second direction crossing the first direction and crossing over the first initialization voltage line in the display area to form a mesh structure, the mesh structure overlapping the area in which light is emitted when viewed in a plan view; and a driving voltage line extending in the second direction between the first pixel circuit and the second pixel circuit, wherein the second initialization voltage line overlaps the driving voltage line when viewing the substrate in the plan view. ### Claim 12 (depends on 11) The display apparatus of claim 11, wherein the first pixel circuit and the second pixel circuit are symmetric with respect to a virtual axis crossing between the first pixel circuit and the second pixel circuit. ### Claim 13 (depends on 12) The display apparatus of claim 12, wherein the first pixel circuit includes a first compensation thin-film transistor electrically connected to the first driving thin-film transistor, and the second pixel circuit includes a second compensation thin-film transistor electrically connected to the second driving thin-film transistor, and a portion of a semiconductor layer of the first compensation thin-film transistor and a portion of a semiconductor layer of the second compensation thin-film transistor overlap a shield electrode electrically connected to the driving voltage line. ### Claim 14 (depends on 12) The display apparatus of claim 12, wherein the driving voltage line is on a layer above the first initialization voltage line, and the second initialization voltage line is on a layer above the driving voltage line. ### Claim 15 (depends on 14) The display apparatus of claim 14, wherein the first initialization voltage line and the second initialization voltage line are electrically connected to each other through a third connection electrode on a layer between the first initialization voltage line and the second initialization voltage line. ### Claim 16 A display apparatus comprising: a substrate having a display area, a component area including a hole, the hole penetrating the substrate and defining boundaries of the component area, and a non-display area outside the display area, the display area being an area in which light is emitted; a first pixel circuit and a second pixel circuit in the display area adjacent to each other around the hole; a first initialization voltage line electrically connected to the first pixel circuit and the second pixel circuit and extending in a first direction; a second initialization voltage line electrically connected to the first initialization voltage line and extending in a second direction crossing the first direction and crossing over the first initialization voltage line in the display area to form a mesh structure, the mesh structure overlapping the area in which light is emitted when viewed in a plan view; and a driving voltage line extending in the second direction between the first pixel circuit and the second pixel circuit, wherein at least one of the first initialization voltage line, the second initialization voltage line, or the driving voltage line is disconnected around the hole. ### Claim 17 (depends on 16) The display apparatus of claim 16, wherein the first pixel circuit includes a first operation control thin-film transistor electrically connected to the driving voltage line, the second pixel circuit includes a second operation control thin-film transistor electrically connected to the driving voltage line, and the first operation control thin-film transistor and the second operation control thin-film transistor are asymmetric with respect to the driving voltage line. ### Claim 18 (depends on 17) The display apparatus of claim 17, wherein a semiconductor layer of the first operation control thin-film transistor is electrically connected to the driving voltage line through a first connection electrode, and the first connection electrode includes: a 1-1st connection electrode corresponding to a portion of any one of electrodes of a first storage capacitor in the first pixel circuit and contacting the driving voltage line; and a 1-2nd connection electrode contacting the 1-1st connection electrode and the semiconductor layer of the first operation control thin-film transistor. ### Claim 19 (depends on 16) The display apparatus of claim 16, wherein the first pixel circuit and the second pixel circuit are symmetric with respect to the driving voltage line. ### Claim 20 (depends on 19) The display apparatus of claim 19, wherein the driving voltage line is on a layer above the first initialization voltage line and the second initialization voltage line is on a layer above the driving voltage line, and the first initialization voltage line and the second initialization voltage line are electrically connected to each other through a third connection electrode located on a layer between the first initialization voltage line and the second initialization voltage line.