# US 12,120,913 B2 · Display panel and display apparatus

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- Number: US 12,120,913 B2
- Document ID: US12120913B2
- Status: Granted
- Kind: B2
- Application number: 18/488,465
- Filed: 2023-10-17
- Published: 2024-02-22
- Granted: 2024-10-15
- Earliest claimed: 2022-01-29
- Assignees: KunShan Go-Visionox Opto-Electronics Co., Ltd
- Applicants: KunShan Go Visionox Opto Electronics Co., Ltd
- Inventors: Gang Wang; Hongjun Xie; Yusheng Liu; Liwei Ding; Lei Mi
- Web page: https://patentgrep.com/patent/US12120913B2

## CPC

- H10K 59/121: characterised by the geometry or disposition of pixel elements
- G09G 3/3233: with pixel circuitry controlling the current through the light-emitting element
- H10K 59/131: Interconnections, e.g. wiring lines or terminals
- H10K 59/353: {characterised by the geometrical arrangement of the RGB subpixels}
- G09G 2300/0408: Integration of the drivers onto the display substrate
- G09G 2300/0426: Layout of electrodes and connections
- G09G 2300/0465: Improved aperture ratio, e.g. by size reduction of the pixel circuit, e.g. for improving the pixel density or the maximum displayable luminance or brightness
- G09G 2300/0804: Sub-multiplexed active matrix panel, i.e. wherein one active driving circuit is used at pixel level for multiple image producing elements
- H10K 59/65: OLEDs integrated with inorganic image sensors
- H10K: ORGANIC ELECTRIC SOLID-STATE DEVICES
- G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00)

## Abstract

A display panel and a display apparatus, and the display panel includes a first display area and a second display area. The display panel includes: a plurality of pixel blocks including a plurality of sub-pixels, each of the pixel blocks including a sub-pixels of the plurality of sub-pixels, the plurality of sub-pixels including a plurality of first sub-pixels located in the first display area and a plurality of second sub-pixels located in the second display area; and a plurality of circuit blocks located in the second display area, each of the circuit blocks including b pixel circuits, the b pixel circuits including first circuits and second circuits; an orthographic projection of the circuit block in a thickness direction of the display panel is located within an orthographic projection of the pixel block in the thickness direction.

## Claims

### Claim 1

A display panel comprising a first display area and a second display area, the display panel further comprising:
a plurality of pixel blocks comprising a plurality of sub-pixels, each of the pixel blocks comprising a sub-pixels of the plurality of sub-pixels, the plurality of sub-pixels comprising a plurality of first sub-pixels located in the first display area and a plurality of second sub-pixels located in the second display area; and
a plurality of circuit blocks located in the second display area, each of the circuit blocks comprising b pixel circuits, the b pixel circuits comprising first circuits and second circuits, at least part of the first circuits being configured to drive the first sub-pixels, and the second circuits being configured to drive the second sub-pixels,
wherein both a and b are positive integers greater than 0, and a is less than b, in the second display area, an orthographic projection of the circuit block in a thickness direction of the display panel is located within an orthographic projection of the pixel block in the thickness direction.

### Claim 2 (depends on 1)

The display panel according to claim 1, wherein in the second display area, the orthographic projection of the circuit block in the thickness direction overlaps the orthographic projection of the pixel block in the thickness direction.

### Claim 3 (depends on 1)

The display panel according to claim 1, wherein
the pixel block comprises a plurality of the sub-pixels distributed in p rows and q columns, and a product of p and q is a; and
the circuit block comprises a plurality of the pixel circuits distributed in e rows and f columns, and a product of e and f is b, wherein p, q, e and f are all positive integers greater than 1, e≥p, and f≥q.

### Claim 4 (depends on 3)

The display panel according to claim 3, wherein p is equal to q, e is equal to f, and e is greater than p.

### Claim 5 (depends on 3)

The display panel according to claim 3, wherein
the second display area comprises a main display area and a transition display area located between the main display area and the first display area, and at least part of the first circuits located in the transition display area are configured to drive the first sub-pixels; and
the circuit block in the main display area is located within the orthographic projection of the pixel block driven by the circuit block, and the circuit block in the main display area comprises p rows and q columns of the second circuits and (e-p) rows and (f-q) columns of the first circuits.

### Claim 6 (depends on 5)

The display panel according to claim 5, wherein in the main display area, a relative position relationship of the plurality of second circuits in the circuit block is the same as a relative position relationship of the plurality of second sub-pixels in the pixel block.

### Claim 7 (depends on 5)

The display panel according to claim 5, wherein the circuit block in the transition display area is located within the orthographic projection of the pixel block driven by the circuit block, and the circuit block in the transition display area comprises p rows and q columns of the second circuits and (e-p) rows and (f-q) columns of the first circuits.

### Claim 8 (depends on 7)

The display panel according to claim 7, wherein in the transition display area, a relative position relationship of the plurality of second circuits in the circuit block is the same as a relative position relationship of the plurality of second sub-pixels in the pixel block.

### Claim 9 (depends on 7)

The display panel according to claim 7, wherein the first circuits comprise a plurality of row circuits arranged side by side in a row direction and column circuits arranged side by side in a column direction; and
at least part of the row circuits are configured to drive the first sub-pixels; or
at least part of the column circuits are configured to drive the first sub-pixels; or
at least part of the row circuits and the column circuits are configured to drive the first sub-pixels.

### Claim 10 (depends on 9)

The display panel according to claim 9, wherein the first display area comprises a regular area and an irregular area located at at least one side of the regular area in the row direction, at least part of the first sub-pixels in the irregular area and at least part of the first sub-pixels in the regular area are arranged in a same row, and at least part of the row circuits are configured to drive the first sub-pixels located in the irregular area.

### Claim 11 (depends on 9)

The display panel according to claim 9, further comprising first row signal lines and second row signal lines, the first row signal lines being connected with the row circuits for driving the first sub-pixels and configured to transmit signals to the row circuits, and the second row signal lines being connected with the second circuits and configured to transmit signals to the second circuits.

### Claim 12 (depends on 11)

The display panel according to claim 11, further comprising a row buffer configured to store driving signals for the first sub-pixels in the irregular area and transmit driving signals to the first row signal lines according to the driving signals for the first sub-pixels in the irregular area.

### Claim 13 (depends on 7)

The display panel according to claim 7, wherein the first display area comprises a frame display area arranged around the second display area and comprising an end frame display area located at at least one side of the second display area in a column direction and a side frame display area located at at least one side of the second display area in a row direction;
at least part of the row circuits are configured to drive the first sub-pixels located in the end frame display area; or
at least part of the column circuits are configured to drive the first sub-pixels located in the side frame display area; or
at least part of the row circuits are configured to drive the first sub-pixels located in the end frame display area, and at least part of the column circuits are configured to drive the first sub-pixels located in the side frame display area.

### Claim 14 (depends on 5)

The display panel according to claim 5, wherein
the first circuits in the transition display area are all located at a side of the second circuits close to the first sub-pixels.

### Claim 15 (depends on 14)

The display panel according to claim 14, wherein a position relationship of the second circuits for driving the second sub-pixels in the transition display area and the first circuits in the transition display area for driving the first sub-pixels is the same as a position relationship of the second sub-pixels in the transition display area and the first sub-pixels in the first display area.

### Claim 16 (depends on 1)

The display panel according to claim 1, further comprising:
a signal line layer comprising first connection signal lines configured to connect the first circuits and the first sub-pixels.

### Claim 17 (depends on 16)

The display panel according to claim 16, wherein at least part of the first connection signal line extends along a second direction, an arrangement size of the first connection signal line in a first direction is m, an arrangement size in the first direction of the first sub-pixel adjacent to the second display area along the second direction is n, 2k first sub-pixels are arranged in the second direction in the first display area, and m and n satisfy n=km+d, wherein k is a positive integer, and d is a positive number less than m.

### Claim 18 (depends on 16)

The display panel according to claim 16, wherein the first connection signal line comprises a first segment and a second segment extending along different directions and located in different film layers.

### Claim 19 (depends on 1)

The display panel according to claim 1, wherein
a plurality of the first circuits for driving the first sub-pixels in a same row are located in a same row; or
the first circuits in a same row are configured to drive two or more rows of the first sub-pixels; or
a plurality of the first circuits for driving the first sub-pixels in a same row are located in a same row, and the first circuits in a same row are configured to drive two or more rows of the first sub-pixels.

### Claim 20 (depends on 1)

A display apparatus comprising the display panel according to claim 1.