# US 12,120,454 B2 · Caption encoder system and method

> Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt

- Number: US 12,120,454 B2
- Document ID: US12120454B2
- Status: Granted
- Kind: B2
- Application number: 17/969,145
- Filed: 2022-10-19
- Published: 2023-04-20
- Granted: 2024-10-15
- Earliest claimed: 2021-10-20
- Assignees: Davincia, LLC
- Applicants: Davincia, LLC
- Inventors: David Kendall; Eddie R. Dry
- Web page: https://patentgrep.com/patent/US12120454B2

## CPC

- H04N 7/08: Systems for the simultaneous or sequential transmission of more than one television signal, e.g. additional information signals, the signals occupying wholly or partially the same frequency band {, e.g. by time division (H04N7/007 takes precedence)}
- H04N 21/23602: {Multiplexing isochronously with the video sync, e.g. according to bit-parallel or bit-serial interface formats, as SDI}
- H04N 21/235: Processing of additional data, e.g. scrambling of additional data or processing content descriptors
- G06F 3/14: Digital output to display device {; Cooperation and interconnection of the display device with other functional units}
- G09G 5/006: {Details of the interface to the display terminal (specific for a display terminal using a CRT G09G1/167; using a flat panel G09G3/2096; circuits for interfacing with colour displays G09G5/04)}
- G09G 5/24: Generation of individual character patterns
- G09G 5/363: {Graphics controllers}
- G09G 2360/06: Use of more than one graphics processor to process data before displaying to one or more screens
- G09G 2370/045: using multiple communication channels, e.g. parallel and serial
- G09G 2370/20: Details of the management of multiple sources of image data
- H04N 7/0885: {for the transmission of subtitles}
- H04N 21/4884: {for displaying subtitles}
- H04N: PICTORIAL COMMUNICATION, e.g. TELEVISION
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)
- G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00)

## Abstract

A caption encoder system is provided that can include a computer system and a caption encoder card. The caption encoder card can include a caption encoder module having at least one of: an input component, a field programmable gate array (FPGA), a microcontroller unit (MCU), a peripheral component interconnect express (PCIe) bridge, and a plurality of output components. The input component can be configured to receive an input SDI stream. The FPGA can be in communication with the input component and can be configured to compile an output SDI stream with embedded closed captions. The MCU can be in communication with the FPGA. The PCIe bridge can be in communication with the microcontroller unit and a plurality of universal serial bus to serial devices. The plurality of output components can be communication with the field programmable gate array.

## Claims

### Claim 1

A peripheral component interconnect express (PCIe) caption encoder card, comprising:
an input component configured to receive an input (serial digital interface) SDI stream;
a field programmable gate array (FPGA) in communication with the input component and configured to compile an output SDI stream with embedded closed captions;
a microcontroller unit (MCU) in communication with the FPGA, the FPGA configured to receive the input SDI stream, extract closed caption data from the input SDI stream, and send the closed caption data to the MCU;
a peripheral component interconnect express (PCIe) bridge in communication with the MCU and a plurality of universal serial bus to serial devices; and
a plurality of output components in communication with the FPGA.

### Claim 2 (depends on 1)

The PCIe caption encoder card of claim 1, wherein the input SDI stream includes audio data.

### Claim 3 (depends on 1)

The PCIe caption encoder card of claim 1, wherein the input component is configured to accept 3 Gigabit/High Definition/Standard Definition-SDI transport SDI streams.

### Claim 4 (depends on 1)

The PCIe caption encoder card of claim 1, wherein the PCIe caption encoder card is configured to re-clock the output SDI stream.

### Claim 5 (depends on 1)

The PCIe caption encoder card of claim 1, wherein the output SDI stream includes a video stream with embedded closed captions.

### Claim 6 (depends on 1)

The PCIe caption encoder card of claim 1, wherein PCIe caption encoder card is configured to decode the output SDI stream.

### Claim 7 (depends on 1)

A caption encoder system, comprising:
a computer system; and
the PCIe caption encoder card of claim 1 operatively installed in a rack of the computer system.

### Claim 8 (depends on 7)

The caption encoder system of claim 7, wherein the caption encoder is configured to operate without a network connection.

### Claim 9 (depends on 7)

The caption encoder system of claim 7, wherein the caption encoder system is configured to broadcast up to eight channels.

### Claim 10

A method for using a caption encoder system, comprising:
providing a caption encoder system including:
a computer system; and
a caption encoder card including an input component configured to receive an input SDI stream, a field programmable gate array (FPGA) in communication with the input component and configured to compile an output SDI stream with embedded closed captions, a microcontroller unit (MCU) in communication with the field programmable gate array, the FPGA is configured to receive the input SDI stream, extract closed caption data from the input SDI stream, and send the closed caption data to the MCU, a peripheral component interconnect express (PCIe) bridge in communication with the MCU and a plurality of universal serial bus to serial devices, and a plurality of output components in communication with the FPGA, the caption encoder card operatively installed in a rack of the computer system; and
using the caption encoder system to transform the input SDI stream including audio data into the output SDI stream with embedded closed captions.

### Claim 11

A peripheral component interconnect express (PCIe) caption encoder card, comprising:
an input component configured to receive an input (serial digital interface) SDI stream;
a field programmable gate array (FPGA) in communication with the input component and configured to compile an output SDI stream with embedded closed captions;
a microcontroller unit (MCU) in communication with the FPGA, the MCU configured to decode closed caption data from the FPGA;
a peripheral component interconnect express (PCIe) bridge in communication with the MCU and a plurality of universal serial bus to serial devices; and
a plurality of output components in communication with the FPGA.

### Claim 12 (depends on 11)

The PCIe caption encoder card of claim 11, wherein the MCU is configured to send the decoded caption data to the FPGA.

### Claim 13

A peripheral component interconnect express (PCIe) caption encoder card, comprising:
an input component configured to receive an input (serial digital interface) SDI stream;
a field programmable gate array (FPGA) in communication with the input component and configured to compile an output SDI stream with embedded closed captions;
a microcontroller unit (MCU) in communication with the FPGA;
a peripheral component interconnect express (PCIe) bridge in communication with the MCU and a plurality of universal serial bus to serial devices, the MCU is configured to send audio data to the PCIe bridge; and
a plurality of output components in communication with the FPGA.

### Claim 14

A peripheral component interconnect express (PCIe) caption encoder card, comprising:
an input component configured to receive an input (serial digital interface) SDI stream;
a field programmable gate array (FPGA) in communication with the input component and configured to compile an output SDI stream with embedded closed captions;
a microcontroller unit (MCU) in communication with the FPGA;
a peripheral component interconnect express (PCIe) bridge in communication with the MCU and a plurality of universal serial bus to serial devices, the PCIe bridge including a plurality of internal USB to serial ports, the plurality of internal USB to serial ports including a first port configured to transfer encoder settings and decoder settings; and
a plurality of output components in communication with the FPGA.

### Claim 15 (depends on 14)

The PCIe caption encoder card of claim 14, wherein the plurality of internal USB to serial ports includes a second port configured to transfer at least one of caption data and text.

### Claim 16 (depends on 15)

The PCIe caption encoder card of claim 15, wherein the plurality of internal USB to serial ports includes a third port configured to transfer at least one of caption data and text.

### Claim 17 (depends on 16)

The PCIe caption encoder card of claim 16, wherein the second port is configured to receive caption data in a first language and the third port is configured to receive caption data in a second language.

### Claim 18

A peripheral component interconnect express (PCIe) caption encoder card, comprising:
an input component configured to receive an input (serial digital interface) SDI stream;
a field programmable gate array (FPGA) in communication with the input component and configured to compile an output SDI stream with embedded closed captions;
a microcontroller unit (MCU) in communication with the FPGA, the MCU configured to simulate a USB microphone;
a peripheral component interconnect express (PCIe) bridge in communication with the MCU and a plurality of universal serial bus to serial devices; and
a plurality of output components in communication with the FPGA.
