# US 12,120,443 B2 · Semiconductor device and electronic device

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- Number: US 12,120,443 B2
- Document ID: US12120443B2
- Status: Granted
- Kind: B2
- Application number: 17/793,104
- Filed: 2021-01-08
- Published: 2023-02-09
- Granted: 2024-10-15
- Earliest claimed: 2020-01-21
- Assignees: Semiconductor Energy Laboratory Co., Ltd.
- Applicants: Semiconductor Energy Laboratory Co., Ltd.
- Inventors: Yoshiyuki Kurokawa; Munehiro Kozuma; Takeshi Aoki; Takuro Kanemura
- Web page: https://patentgrep.com/patent/US12120443B2

## CPC

- H04N 25/74: Circuitry for scanning or addressing the pixel array
- G06F 7/523: Multiplying only
- G06G 7/60: for living beings, e.g. their nervous systems {; for problems in the medical field}
- G06N 3/063: using electronic means
- H10K 39/32: Organic image sensors
- H10B 12/00: Dynamic random access memory [DRAM] devices
- H10D 30/6734: {having gate electrodes arranged on both top and bottom sides of the channel, e.g. dual-gate TFTs}
- H10D 30/6755: {Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate}
- H10D 86/423: {comprising semiconductor materials not belonging to the Group IV, e.g. InGaZnO}
- H10D 86/481: {integrated with passive devices, e.g. auxiliary capacitors}
- H10D 86/60: wherein the TFTs are in active matrices
- H10D 87/00: Integrated devices comprising both bulk components and either SOI or SOS components on the same substrate
- H10F 39/809: {of hybrid image sensors}
- H10F 39/811: {Interconnections}
- H04N: PICTORIAL COMMUNICATION, e.g. TELEVISION
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)
- G06G: ANALOGUE COMPUTERS (analogue optical computing devices G06E3/00)
- G06N: COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
- H10K: ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10B: ELECTRONIC MEMORY DEVICES
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10F: INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION

## Abstract

A semiconductor device that has low power consumption and is capable of performing a product-sum operation is provided. The semiconductor device includes first and second cells, a first circuit, and first to third wirings. Each of the first and second cells includes a capacitor, and a first terminal of each of the capacitors is electrically connected to the third wiring. Each of the first and second cells has a function of feeding a current based on a potential held at a second terminal of the capacitor, to a corresponding one of the first and second wirings. The first circuit is electrically connected to the first and second wirings and stores currents I1 and I2 flowing through the first and second wirings. When the potential of the third wiring changes and accordingly the amount of current of the first wiring changes from I1 to I3 and the amount of current of the second wiring changes from I2 to I4, the first circuit generates a current with an amount I1−I2−I3+I4. Note that the potential of the third wiring is changed by firstly inputting a reference potential to the third wiring and then inputting a potential based on internal data or a potential based on information obtained by a sensor.

## Claims

### Claim 1

A semiconductor device comprising:
a first cell, a second cell, a first circuit, a second circuit, a third circuit, a fourth circuit, a first wiring, a second wiring, and a third wiring,
wherein the first cell comprises a first capacitor,
wherein the second cell comprises a second capacitor,
wherein the third circuit comprises a sensor,
wherein the first circuit comprises a fifth circuit and a sixth circuit,
wherein the first cell is electrically connected to the first circuit through the first wiring,
wherein a first terminal of the first capacitor in the first cell is electrically connected to the third wiring,
wherein the second cell is electrically connected to the first circuit through the second wiring,
wherein a first terminal of the second capacitor in the second cell is electrically connected to the third wiring,
wherein the second circuit is electrically connected to the fourth circuit,
wherein the third circuit is electrically connected to the fourth circuit,
wherein the third wiring is electrically connected to the fourth circuit,
wherein the fourth circuit has a function of setting a state between the second circuit and the third wiring and a state between the third circuit and the third wiring,
wherein the first cell has:
a function of holding a first potential at a second terminal of the first capacitor when a first input potential is input to the third wiring;
a function of feeding a current based on the first potential between the first cell and the first wiring; and
a function of feeding a current based on a second potential between the first cell and the first wiring when the first potential held at the second terminal of the first capacitor changes to the second potential in response to a change of the first input potential of the third wiring to a second input potential,
wherein the second cell has:
a function of holding a third potential at a second terminal of the second capacitor when the first input potential is input to the third wiring;
a function of feeding a current based on the third potential between the second cell and the second wiring; and
a function of feeding a current based on a fourth potential between the second cell and the second wiring when the third potential held at the second terminal of the second capacitor changes to the fourth potential in response to a change of the first input potential of the third wiring to the second input potential,
wherein when the potential of the third wiring is the first input potential, a first current flows between the first circuit and the first wiring and a second current flows between the first circuit and the second wiring,
wherein when the potential of the third wiring is the second input potential, a third current flows between the first circuit and the first wiring and a fourth current flows between the first circuit and the second wiring,
wherein the fifth circuit has a function of feeding the first current with an amount I1 to the first wiring when the potential of the third wiring is the second input potential,
wherein the sixth circuit has a function of feeding the second current with an amount I2 to the first wiring when the potential of the third wiring is the second input potential,
wherein the first circuit has a function of obtaining an amount I3 of the third current and an amount I4 of the fourth current and generating a current with an amount I1−I2−I3+I4 when the potential of the third wiring is the second input potential,
wherein the second circuit has:
a function of generating a fifth potential;
a function of generating a sixth potential based on internal data input to the second circuit; and
a function of outputting the fifth potential as the first input potential or the sixth potential as the second input potential to the fourth circuit, and
wherein the third circuit has:
a function of generating a seventh potential before the sensor obtains information;
a function of generating an eighth potential based on the information obtained by the sensor; and
a function of outputting the seventh potential as the first input potential or the eighth potential as the second input potential to the fourth circuit.

### Claim 2 (depends on 1)

The semiconductor device according to claim 1,
wherein the third circuit comprises a first transistor, a second transistor, a third transistor, and a fourth transistor,
wherein a first terminal of the sensor is electrically connected to a first terminal of the first transistor,
wherein a second terminal of the first transistor is electrically connected to a first terminal of the second transistor and a gate of the third transistor, and
wherein a first terminal of the third transistor and a first terminal of the fourth transistor are electrically connected to the third wiring through the fourth circuit.

### Claim 3 (depends on 1)

The semiconductor device according to claim 1,
wherein the sensor comprises a photodiode.

### Claim 4 (depends on 1)

The semiconductor device according to claim 1,
wherein the first cell comprises a fifth transistor and a sixth transistor,
wherein the second cell comprises a seventh transistor and an eighth transistor,
wherein a first terminal of the fifth transistor is electrically connected to the second terminal of the first capacitor and a gate of the sixth transistor,
wherein a first terminal of the sixth transistor is electrically connected to the first wiring,
wherein a first terminal of the seventh transistor is electrically connected to the second terminal of the second capacitor and a gate of the eighth transistor, and
wherein a first terminal of the eighth transistor is electrically connected to the second wiring.

### Claim 5 (depends on 1)

The semiconductor device according to claim 1,
wherein the second circuit comprises a digital-to-analog converter circuit, and
wherein the digital-to-analog converter circuit converts an input digital signal based on the internal data into the sixth potential, and outputs the sixth potential to the fourth circuit.

### Claim 6 (depends on 1)

The semiconductor device according to claim 1,
wherein the third circuit is positioned above the first cell and the second cell.

### Claim 7

A semiconductor device comprising:
a first cell comprising a first capacitor;
a second cell comprising a second capacitor:
a first circuit electrically connected to the first cell through a first wiring and electrically connected to the second cell through a second wiring;
a second circuit electrically connected to a fourth circuit; and
a third circuit electrically connected to the fourth circuit, the third circuit comprising a sensor,
wherein a first terminal of the first capacitor is electrically connected to the fourth circuit through a third wiring,
wherein a first terminal of the second capacitor is electrically connected to the fourth circuit through the third wiring,
wherein the third circuit further comprises a first transistor, a second transistor, a third transistor, and a fourth transistor,
wherein a first terminal of the sensor is electrically connected to a first terminal of the first transistor,
wherein a second terminal of the first transistor is electrically connected to a first terminal of the second transistor and a gate of the third transistor, and
wherein a first terminal of the third transistor and a first terminal of the fourth transistor are electrically connected to the third wiring through the fourth circuit.

### Claim 8 (depends on 7)

The semiconductor device according to claim 7,
wherein the sensor comprises a photodiode.

### Claim 9 (depends on 7)

The semiconductor device according to claim 7,
wherein the first cell comprises a fifth transistor and a sixth transistor,
wherein the second cell comprises a seventh transistor and an eighth transistor,
wherein a first terminal of the fifth transistor is electrically connected to the second terminal of the first capacitor and a gate of the sixth transistor,
wherein a first terminal of the sixth transistor is electrically connected to the first wiring,
wherein a first terminal of the seventh transistor is electrically connected to the second terminal of the second capacitor and a gate of the eighth transistor, and
wherein a first terminal of the eighth transistor is electrically connected to the second wiring.

### Claim 10 (depends on 7)

The semiconductor device according to claim 7,
wherein the second circuit comprises a digital-to-analog converter circuit.

### Claim 11 (depends on 7)

The semiconductor device according to claim 7,
wherein the third circuit is positioned above the first cell and the second cell.