# US 12,119,968 B2 · Methods and apparatus for demodulating digital signals

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- Number: US 12,119,968 B2
- Document ID: US12119968B2
- Status: Granted
- Kind: B2
- Application number: 18/364,308
- Filed: 2023-08-02
- Published: 2023-11-23
- Granted: 2024-10-15
- Earliest claimed: 2021-04-30
- Assignees: STMicroelectronics Asia Pacific Pte Ltd
- Applicants: STMicroelectronics Asia Pacific Pte Ltd.
- Inventors: Ade Putra; Kusuma Adi Ningrat; Mythreyi Nagarajan
- Web page: https://patentgrep.com/patent/US12119968B2

## CPC

- G06F 3/04182: {Filtering of noise external to the device and not generated by digitiser components}
- H04L 27/22: Demodulator circuits; Receiver circuits
- G06F 3/04162: {for exchanging data with external devices, e.g. smart pens, via the digitiser sensing hardware}
- G06F 3/04166: {Details of scanning methods, e.g. sampling time, grouping of sub areas or time sharing with display driving (Synchronisation with the driving of the display or the backlighting unit to avoid interferences generated internally G06F3/04184)}
- G06F 3/044: by capacitive means
- H03M 1/124: {Sampling or signal conditioning arrangements specially adapted for A/D converters}
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)
- H04L: TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION (arrangements common to telegraphic and telephonic communication H04M)
- H03M: CODING; DECODING; CODE CONVERSION IN GENERAL (using fluidic means F15C4/00; optical analogue/digital converters G02F7/00; coding, decoding or code conversion, specially adapted for particular applications, see the relevant subclasses, e.g. G01D, G01R, G06F, G06T, G09G, G10L, G11B, G11C, H04B, H04L, H04M, H04N; ciphering or deciphering for cryptography or other purposes involving the need for secrecy G09C)

## Abstract

A device includes an analog to digital converter configured to convert voltages into a digital signal by sampling the voltages at a fixed sampling time; a first multiplier configured to multiply the digital signal with in-phase coefficients, the in-phase coefficients generated to produce a demodulated in-phase signal at a demodulation signal frequency; a first adder configured accumulate the demodulated in-phase signal to output in-phase magnitude values; a second multiplier configured to multiply the digital signal with quadrature coefficients, the quadrature coefficients generated to produce a demodulated quadrature signal at the demodulation signal frequency; and a second adder configured to accumulate the demodulated quadrature signal to output quadrature magnitude values.

## Claims

### Claim 1

A device, comprising:
a first multiplier configured to multiply in-phase coefficients with digital windowing function coefficients to generate windowed digital in-phase coefficients, the in-phase coefficients generated to produce a demodulated in-phase signal at a demodulation signal frequency, the digital windowing function coefficients comprising digital filter coefficients, the in-phase coefficients expressible as
In
=
sin
⁢
(
2
⁢
π
·
n
·
Ns
Nc
)
,
where sin( ) is the trigonometric sine function, In is the n-th in-phase coefficient, Ns is the number of input cycles, n is a coefficient index, and Nc is the number of demodulation coefficients;
a second multiplier configured to multiply quadrature coefficients with the digital windowing function coefficients to generate windowed digital quadrature coefficients, the quadrature coefficients generated to produce a demodulated quadrature signal at the demodulation signal frequency, the quadrature coefficients expressible as
Q
⁢
n
=
cos
⁢
(
2
⁢
π
·
n
·
Ns
N
⁢
c
)
,
where cos( ) is the trigonometric cosine function, Qn is the n-th quadrature coefficient, Ns is the number of input cycles, n is a coefficient index, and Nc is the number of demodulation coefficients;
an analog to digital converter (ADC) configured to convert an input signal into a digital signal by sampling the input signal at a fixed sampling time;
a third multiplier operatively coupled to the ADC and the first multiplier, the third multiplier configured to multiply the digital signal with the windowed digital in-phase coefficients; and
a fourth multiplier operatively coupled to the ADC and the second multiplier, the fourth multiplier configured to multiply the digital signal with an output of the second multiplier.

### Claim 2 (depends on 1)

The device of claim 1, wherein the in-phase coefficients and the quadrature coefficients are generated in accordance with the demodulation signal frequency and stored in a memory.

### Claim 3 (depends on 1)

The device of claim 1, wherein the input signal corresponds to sensory information from an output of a sensor array of a touch sensitive display screen.

### Claim 4 (depends on 1)

The device of claim 1, wherein the fixed sampling time and the demodulation signal frequency are different.

### Claim 5 (depends on 1)

The device of claim 1, wherein the demodulation signal frequency (Fd) is expressible as
F
d
=
N
s
T
adc
×
N
c
,
where Tadc is the sampling time of the signal.

### Claim 6 (depends on 1)

The device of claim 1, wherein the in-phase coefficients and the quadrature coefficients are generated for a plurality of different demodulation signal frequencies and a plurality of different numbers of demodulation coefficients.

### Claim 7 (depends on 1)

The device of claim 1, wherein the number of demodulation coefficients and cycles are changed to adjust the demodulation signal frequency.

### Claim 8

A method for demodulating a signal, the method comprising:
digitizing the signal at a fixed sampling time to generate a digitized signal;
demodulating the digitized signal into a demodulated in-phase signal and a demodulated quadrature signal, the demodulating comprising:
multiplying in-phase coefficients with digital windowing function coefficients to generate windowed digital in-phase coefficients, the in-phase coefficients generated to produce a demodulated in-phase signal at a demodulation signal frequency, the digital windowing function coefficients comprising digital filter coefficients;
multiplying quadrature coefficients with the digital windowing function coefficients to generate windowed digital quadrature coefficients, the quadrature coefficients generated to produce a demodulated quadrature signal at the demodulation signal frequency;
multiplying the digitized signal with windowed digital in-phase coefficients to generate demodulated in-phase signals;
multiplying the digitized signal with windowed digital quadrature coefficients to generate demodulated quadrature signals; and
accumulating the demodulated in-phase signals and the demodulated quadrature signals to produce in-phase magnitude values and quadrature magnitude values.

### Claim 9 (depends on 8)

The method of claim 8, wherein the in-phase coefficients are expressible as
sin
⁢
(
3
×
2
⁢
π
k
⁢
n
)
,
and wherein the quadrature coefficients are expressible as
cos
⁢
(
3
×
2
⁢
π
k
⁢
n
)
,
where n is a coefficient index and k is the number of digital in-phase coefficients.

### Claim 10 (depends on 8)

The method of claim 8, wherein the in-phase coefficients and the quadrature coefficients are generated in accordance with the demodulation signal frequency and stored in a memory.

### Claim 11 (depends on 8)

The method of claim 8, wherein the input signal corresponds to sensory information from an output of a sensor array of a touch sensitive display screen.

### Claim 12 (depends on 8)

The method of claim 8, wherein the fixed sampling time and the demodulation signal frequency are different.

### Claim 13 (depends on 8)

The method of claim 8, wherein the demodulation signal frequency (Fd) is expressible as
F
d
=
N
s
T
adc
×
N
c
,
where Tadc is the sampling time of the signal.

### Claim 14 (depends on 8)

The method of claim 8, wherein the in-phase coefficients and the quadrature coefficients are generated for a plurality of different demodulation signal frequencies and a plurality of different numbers of demodulation coefficients.

### Claim 15

A device, comprising:
a first multiplier configured to multiply in-phase coefficients with digital windowing function coefficients to generate windowed digital in-phase coefficients, the in-phase coefficients generated to produce a demodulated in-phase signal at a demodulation signal frequency, the digital windowing function coefficients comprising digital filter coefficients;
a second multiplier configured to multiply quadrature coefficients with the digital windowing function coefficients to generate windowed digital quadrature coefficients, the quadrature coefficients generated to produce a demodulated quadrature signal at the demodulation signal frequency;
an analog to digital converter (ADC) configured to convert an input signal into a digital signal by sampling the input signal at a fixed sampling time;
a third multiplier operatively coupled to the ADC and the first multiplier, the third multiplier configured to multiply the digital signal with the windowed digital in-phase coefficients; and
a fourth multiplier operatively coupled to the ADC and the second multiplier, the fourth multiplier configured to multiply the digital signal with an output of the second multiplier;
a first adder operatively coupled to the third multiplier, the first adder configured to accumulate the demodulated in-phase signal to output in-phase magnitude values; and
a second adder operatively coupled to the fourth multiplier, the second adder configured to accumulate the demodulated quadrature signal to output quadrature magnitude values.

### Claim 16 (depends on 15)

The device of claim 15, wherein the in-phase coefficients are expressible as
sin
⁢
(
3
×
2
⁢
π
k
⁢
n
)
,
and wherein the quadrature coefficients are expressible as
cos
⁢
(
3
×
2
⁢
π
k
⁢
n
)
,
where n is a coefficient index and k is the number of digital in-phase coefficients.

### Claim 17 (depends on 15)

The device of claim 15, wherein the in-phase coefficients and the quadrature coefficients are generated in accordance with the demodulation signal frequency and stored in a memory.

### Claim 18 (depends on 15)

The device of claim 15, wherein the input signal corresponds to sensory information from an output of a sensor array of a touch sensitive display screen.

### Claim 19 (depends on 15)

The device of claim 15, wherein the fixed sampling time and the demodulation signal frequency are different.

### Claim 20 (depends on 15)

The device of claim 15, wherein the demodulation signal frequency (Fd) is expressible as
F
d
=
N
s
T
adc
×
N
c
,
where Tadc is the sampling time of the signal.