Feed forward equalizer and system including the same
AssigneeSamsung Electronics Co., Ltd.
InventorsChangjae Moon, Byungsub Kim
Life of this patent
Estimating the term…
Abstract
A feed forward equalizer includes a plurality of delay circuits connected to each other in series and configured to delay input signals. A plurality of filters respectively correspond to outputs of the plurality of delay circuits, except for a reference output which is an output of a first delay circuit among the plurality of delay circuits, and the input signals. A calculator configured to sum the reference output and outputs of the plurality of filters. Each of the plurality of filters is configured to receive an output of a delay circuit corresponding thereto, among the plurality of filters, and the reference output.
Claims20
A feed forward equalizer comprising:
- a plurality of delay circuits connected to each other in series and configured to delay input signals, the plurality of delay circuits including a first delay circuit configured to output a reference output;
- a plurality of filters respectively corresponding to outputs of the plurality of delay circuits except for the reference output, which is an output of a first delay circuit, among the plurality of delay circuits, and the input signals, wherein each of the plurality of filters is configured to receive an output of a delay circuit corresponding thereto among the plurality of filters, and the reference output;
- and
- a calculator configured to sum the reference output and to output of the plurality of filters.
A feed forward equalizer comprising:
- a delay circuit configured to receive input data, wherein the delay circuit comprises a plurality of latch circuits configured to output a plurality of tap signals by sequentially delaying the input data;
- a decoding circuit configured to receive output data of the delay circuit, the decoding circuit comprising a plurality of decoders configured to perform a decoding operation corresponding to each of the plurality of tap signals except for a reference tap signal, which is a tap signal of a first latch circuit, each of the plurality of decoders is configured to perform the decoding operation by receiving the reference tap signal and a tap signal corresponding thereto among the plurality of decoders;
- and
- a calculator configured to sum outputs of the decoding circuit.
A feed forward equalizer comprising:
- a first delay circuit and a second delay circuit configured to receive a first input signal and a second input signal, and delay the first input signal and the second input signal by using a plurality of latch circuits, respectively;
- a first decoding circuit and a second decoding circuit configured to generate a plurality of decoding signals by decoding output signals of the first delay circuit and the second delay circuit, respectively, each of the first decoding circuit and the second decoding circuit comprising a plurality of decoders respectively corresponding to the outputs of the plurality of latch circuits except for first and second reference outputs for performing a decoding operation;
- a first multiplexer configured to receive the plurality of decoding signals of the first and second decoding circuits;
- a second multiplexer configured to receive the first reference output, which is an output of a first latch circuit of the first delay circuit, and the second reference output, which is an output of a second latch circuit of the second delay circuit;
- and
- a summing driver configured to receive and sum outputs of the first and second multiplexers.
Dependencies are inferred from the claim text.