# US 12,119,835 B2 · Digital pre-distortion method and apparatus for a digital to analog converter > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,119,835 B2 - Document ID: US12119835B2 - Status: Granted - Kind: B2 - Application number: 17/964,031 - Filed: 2022-10-11 - Published: 2024-04-11 - Granted: 2024-10-15 - Earliest claimed: 2022-10-11 - Assignees: Avago Technologies International Sales Pte. Limited - Applicants: Avago Technologies International Sales Pte. Limited - Inventors: Ahmed Elkholy; Jun Cao; Adesh Garg - Web page: https://patentgrep.com/patent/US12119835B2 ## CPC - H03M 1/0626: {by filtering} - H03M 1/0614: {of harmonic distortion (H03M1/0617 takes precedence)} - H03M 1/066: {by continuously permuting the elements used, i.e. dynamic element matching} - H03M 1/0665: {using data dependent selection of the elements, e.g. data weighted averaging} - H03M 1/0673: {using random selection of the elements (with data-controlled random generator H03M1/0665)} - H03M 1/66: Digital/analogue converters ({H03M1/001 – } H03M1/10 take precedence) - H03M: CODING; DECODING; CODE CONVERSION IN GENERAL (using fluidic means F15C4/00; optical analogue/digital converters G02F7/00; coding, decoding or code conversion, specially adapted for particular applications, see the relevant subclasses, e.g. G01D, G01R, G06F, G06T, G09G, G10L, G11B, G11C, H04B, H04L, H04M, H04N; ciphering or deciphering for cryptography or other purposes involving the need for secrecy G09C) ## Abstract A system includes a first circuit configured to provide a digitally pre-distorted input signal, a digital-to-analog converter including a number of unit elements, a digital input, and a digital output. Each unit element is configured to receive a reference voltage and to be controllable by a control signal provided in response to the digitally pre-distorted input signal. The digital-to-analog converter provides an analog output. The first circuit is configured to reduce distortion due to signal dependent changes to the reference voltage. The signal dependent changes can be due at least in part to current through the supply network that supplies the reference voltage. The digital to analog converter can be a voltage mode converter. ## Claims ### Claim 1 A method comprising: receiving a first digital signal; changing the first digital signal to provide a second digital signal, wherein the change of the first digital signal reduces distortion associated with a supply network providing a reference voltage; providing a selection signal to a plurality of unit elements in response to the second digital signal, the unit elements receiving the reference voltage and providing voltage or current in response to the selection signal; and providing an analog signal in response to the second digital signal. ### Claim 2 (depends on 1) The method of claim 1, further comprising: determining a first number of the unit elements of a digital-to-analog converter to be turned on from an off state, based, at least in part, on a number of transitions Ntrn; determining a second number of the unit elements of the digital-to-analog converter to be turned off from an on state, based, at least in part, on the number of transitions Ntrn; selecting, using a constant transition rate dynamic element matching algorithm, the first number of the unit elements from the unit elements in the off state to be turned on; and selecting, via the dynamic element matching algorithm, the second number of the unit elements from the unit elements in the on state to be turned off. ### Claim 3 (depends on 2) The method of claim 2, further comprising: generating the selection signal as a unary code, wherein the unary code is configured to turn on the selected first number of the unit elements, and turn off the selected second number of the unit elements, wherein each respective bit position of the unary code controls a state of a respective unit element corresponding to the respective bit position; and controlling the state of each of the unit elements based on the unary code. ### Claim 4 (depends on 3) The method of claim 3, wherein determining whether the number of transitions Ntrn can be performed further comprises: determining whether a value of the second digital signal is less than (Ntrn/2), and further that the total number of the unit elements minus the value of the second digital signal is greater than (Ntrn/2). ### Claim 5 (depends on 3) The method of claim 3, further comprising: adjusting the number of transitions Ntrn based on a determination that the number of transitions Ntrn cannot be performed, wherein adjusting the number of transitions Ntrn includes reducing the number of transitions Ntrn. ### Claim 6 (depends on 1) The method of claim 1, wherein changing the first digital signal uses a digital filter having a response related to a response of the supply network. ### Claim 7 (depends on 1) The method of claim 1, wherein changing the first digital signal is a digital pre-distortion operation. ### Claim 8 (depends on 7) The method of claim 7, wherein the digital pre-distortion operation comprises an open loop approach using pre-defined digital filter coefficients and a d2 gain coefficient or comprises a closed loop approach using an analog-to-digital converter (ADC) to digitize the analog signal and a processor to provide the digital filter coefficients and the d2 gain coefficient. ### Claim 9 A circuit comprising: a plurality of unit elements; a digital input configured to receive a first digital signal; circuitry configured to adjust the first digital signal using a supply network response and provide a second digital signal; and wherein the circuitry is configured to provide a code for turning the unit elements to an on state or an off state in accordance with the second digital signal, wherein the code is provided such that a variation of a number of the unit elements transitioning from the off state to the on state or from the on state to the off state is decreased. ### Claim 10 (depends on 9) The circuit of claim 9, whereby the circuitry reduces distortion due to switching current associated with the unit elements. ### Claim 11 (depends on 9) The circuit of claim 9, whereby the circuitry provides digital pre-distortion to reduce distortion due to current through a supply network. ### Claim 12 (depends on 9) The circuit of claim 9, whereby the circuitry reduces distortion due to switching current in the circuit. ### Claim 13 (depends on 9) The circuit of claim 9, wherein the circuitry comprises a digital filter having a frequency response corresponding to the supply network response. ### Claim 14 (depends on 9) The circuit of claim 9, wherein the second digital signal is defined by the following expression: (xa+d2xa×xa2*hSUP(nT)) where xa is the first digital signal, ds is a coefficient, and hSUP(nT) is related to the supply network response. ### Claim 15 (depends on 9) The circuit of claim 9, wherein the circuitry comprises: a first multiplier configured to receive the first digital signal; a subtracter coupled to the first multiplier; a filter coupled to the subtracter; a second multiplier coupled to the filter; and an adder coupled to the first multiplier and the second multiplier configured to provide the second digital signal. ### Claim 16 A system comprising: a first circuit configured to provide a digitally pre-distorted input signal; and a digital-to-analog converter comprising a plurality of unit elements, a digital input, and an analog output, each unit element configured to receive a reference voltage and is controlled by a control signal provided in response to the digitally pre-distorted input signal, wherein the digital-to-analog converter provides an analog signal at the analog output, wherein the first circuit is configured to reduce distortion due to digital signal dependent changes to the reference voltage. ### Claim 17 (depends on 16) The system of claim 16, wherein the digital signal dependent changes are due at least in part to current provided through a supply network that supplies the reference voltage. ### Claim 18 (depends on 16) The system of claim 16, wherein the first circuit comprises: a first multiplier configured to receive an input signal; a subtracter coupled to the first multiplier; a filter coupled to the subtracter; a second multiplier coupled to the filter; an adder coupled to the first multiplier and the second multiplier; and a third multiplier coupled between the first multiplier and the second multiplier. ### Claim 19 (depends on 16) The system of claim 16, wherein the first circuit comprises: a first multiplier configured to receive an input signal; a subtracter coupled to the first multiplier; a filter coupled to the subtracter; a second multiplier coupled to the filter; and an adder coupled to the first multiplier and the second multiplier. ### Claim 20 (depends on 16) The system of claim 16, further comprising: a second circuit configured to provide a code for turning the unit elements to an on state or an off state in response to the digitally pre-distorted input signal, wherein the code is provided using dynamic element matching logic. ### Claim 21 An apparatus, comprising: circuitry configure to change a first digital signal and provide a second digital signal, wherein the change of the first digital signal reduces distortion associated with a supply network providing a reference voltage, wherein the circuitry is configured to provide a selection signal to a plurality of unit elements in response to the second digital signal, the unit elements receiving the reference voltage and providing voltage or current in response to the selection signal, wherein the circuitry is configured to provide an analog signal in response to the second digital signal.