# US 12,119,812 B2 · Electronic circuit arrangement for current distribution > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,119,812 B2 - Document ID: US12119812B2 - Status: Granted - Kind: B2 - Application number: 18/065,637 - Filed: 2022-12-14 - Published: 2023-06-22 - Granted: 2024-10-15 - Earliest claimed: 2021-12-14 - Assignees: dSPACE GmbH - Applicants: dSPACE GmbH - Inventors: Paul Gruber - Web page: https://patentgrep.com/patent/US12119812B2 ## CPC - H03K 17/122: {in field-effect transistor switches} - H03K 17/145: {in field-effect transistor switches} - H03K 3/011: Modifications of generator to compensate for variations in physical values, e.g. voltage, temperature {(to maintain energy constant H03K3/015)} - H03K 17/6877: {the control circuit comprising active elements different from those used in the output circuit} - H03K: PULSE TECHNIQUE (measuring pulse characteristics G01R; modulating sinusoidal oscillations with pulses H03C; transmission of digital information H04L; discriminator circuits detecting phase difference between two signals by counting or integrating cycles of oscillation H03D3/04; automatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses where the type of generator is irrelevant or unspecified H03L; coding, decoding or code conversion, in general H03M) ## Abstract An electronic circuit for uniform distribution of a current includes: a first MOSFET and a second MOSFET, wherein the first MOSFET and the second MOSFET are connected in parallel in order to distribute a current applied to an input terminal, the current flowing towards an output terminal of the electronic circuit, wherein the input terminal is respectively connected to a drain terminal of the first MOSFET and to a drain terminal of the second MOSFET; and a terminal for a control voltage, wherein the control voltage is applied to a gate terminal of the first MOSFET and to a gate terminal of the second MOSFET. The first MOSFET comprises a first resistor at the gate terminal of the first MOSFET, and the second MOSFET comprises a second resistor at the gate terminal of the second MOSFET. ## Claims ### Claim 1 An electronic circuit for uniform distribution of a current, comprising: a first MOSFET and a second MOSFET, wherein the first MOSFET and the second MOSFET are connected in parallel in order to distribute a current applied to an input terminal, the current flowing towards an output terminal of the electronic circuit, wherein the input terminal is respectively connected to a drain terminal of the first MOSFET and to a drain terminal of the second MOSFET; and a terminal for a control voltage, wherein the control voltage is applied to a gate terminal of the first MOSFET and to a gate terminal of the second MOSFET; wherein the first MOSFET comprises a first resistor at the gate terminal of the first MOSFET, and the second MOSFET comprises a second resistor at the gate terminal of the second MOSFET; wherein a source terminal of the first MOSFET is connected to a first source resistor and a source terminal of the second MOSFET is connected to a second source resistor, wherein the first source resistor and the second source resistor are connected to the output terminal of the electronic circuit; wherein the electronic circuit further comprises a first transistor and a second transistor, wherein a base of the first transistor is connected to the source terminal of the first MOSFET, and a base of the second transistor is connected to the source terminal of the second MOSFET; wherein an emitter terminal of the first transistor and an emitter terminal of the second transistor are connected to each other and to a current source, wherein the current source is dimensioned to a predetermined amount of current per MOSFET in the electronic circuit so as to limit a voltage drop over each of the first and second resistors; wherein a collector terminal of the first transistor is connected to the gate terminal of the first MOSFET, and a collector terminal of the second transistor is connected to the gate terminal of the second MOSFET; wherein the first transistor and the second transistor are configured to equalize the current through the first MOSFET and the current through the second MOSFET; wherein the first transistor, in relation to the first MOSFET, and the second transistor, in relation to the second MOSFET, are arranged in the electronic circuit such that a first thermal coupling is established between the first MOSFET and the first transistor and a second thermal coupling is established between the second MOSFET and the second transistor; wherein the first transistor and the second transistor are configured to adjust gate voltages of the first and second MOSFETs based on the first and second thermal couplings. ### Claim 2 (depends on 1) The electronic circuit according to claim 1, wherein the first transistor at its collector terminal comprises a first capacitor, and the second transistor at its collector terminal comprises a second capacitor. ### Claim 3 (depends on 1) The electronic circuit according to claim 1, wherein the first transistor at its collector terminal comprises a first diode, and the second transistor at its collector terminal comprises a second diode. ### Claim 4 (depends on 1) The electronic circuit according to claim 1, wherein the first transistor at its emitter terminal comprises a third resistor, and the second transistor at its emitter terminal comprises a fourth resistor. ### Claim 5 (depends on 1) The electronic circuit according to claim 1, wherein the first transistor and the second transistor are bipolar transistors. ### Claim 6 (depends on 1) The electronic circuit according to claim 1, wherein the first MOSFET and the first transistor are thermally connected to one another via a first thermally conductive medium, and wherein the second MOSFET and the second transistor are thermally connected to one another via a second thermally conductive medium. ### Claim 7 (depends on 6) The electronic circuit according to claim 6, wherein the first and second thermally conductive mediums are conductor traces of a common circuit board. ### Claim 8 (depends on 1) The electronic circuit according to claim 1, wherein more than two MOSFETs are connected in parallel. ### Claim 9 A system, comprising a first electronic circuit and a second electronic circuit, wherein the first electronic circuit comprises: a first MOSFET and a second MOSFET, wherein the first MOSFET and the second MOSFET are connected in parallel in order to distribute a current applied to an input terminal, the current flowing towards an output terminal of the electronic circuit, wherein the input terminal is respectively connected to a drain terminal of the first MOSFET and to a drain terminal of the second MOSFET; and a terminal for a control voltage, wherein the control voltage is applied to a gate terminal of the first MOSFET and to a gate terminal of the second MOSFET; wherein the first MOSFET comprises a first resistor at the gate terminal of the first MOSFET, and the second MOSFET comprises a second resistor at the gate terminal of the second MOSFET; wherein a source terminal of the first MOSFET is connected to a first source resistor and a source terminal of the second MOSFET is connected to a second source resistor, wherein the first source resistor and the second source resistor are connected to the output terminal of the electronic circuit; wherein the electronic circuit further comprises a first transistor and a second transistor, wherein a base of the first transistor is connected to the source terminal of the first MOSFET, and a base of the second transistor is connected to the source terminal of the second MOSFET; wherein an emitter terminal of the first transistor and an emitter terminal of the second transistor are connected to each other and to a current source, wherein the current source is dimensioned to a predetermined amount of current per MOSFET in the electronic circuit so as to limit a voltage drop over each of the first and second resistors; wherein a collector terminal of the first transistor is connected to the gate terminal of the first MOSFET, and a collector terminal of the second transistor is connected to the gate terminal of the second MOSFET; wherein the first transistor and the second transistor are configured to equalize the current through the first MOSFET and the current through the second MOSFET; wherein the first transistor, in relation to the first MOSFET, and the second transistor, in relation to the second MOSFET, are arranged in the electronic circuit such that a first thermal coupling is established between the first MOSFET and the first transistor and a second thermal coupling is established between the second MOSFET and the second transistor; wherein the first transistor and the second transistor are configured to adjust gate voltages of the first and second MOSFETs based on the first and second thermal couplings; wherein the second electronic circuit corresponds to a mirroring of the first electronic circuit, wherein, in the mirrored second electronic circuit arrangement, the dopings of the transistors are reversed, the forward directions of diodes are reversed, and the voltages and currents are negated; wherein the first electronic circuit and the second electronic circuit have a common output terminal with common source resistors, or a common output terminal with separate source resistors for the first electronic circuit and the second electronic circuit. ### Claim 10 A method for uniform distribution of a current, the method comprising: providing an electronic circuit; and equalizing a current applied at an input terminal, the current flowing towards an output terminal, via a first MOSFET and a second MOSFET, wherein a gate voltage of the first MOSFET is adjusted via a first transistor, and a gate voltage of the second MOSFET is adjusted via a second transistor; wherein, via a first thermal coupling between the first MOSFET and the first transistor and a second thermal coupling between the second MOSFET and the second transistor, the current is balanced in the event of an inequality of temperature between the first MOSFET and the second MOSFET; wherein a base of the first transistor is connected to a source terminal of the first MOSFET, and a base of the second transistor is connected to a source terminal of the second MOSFET; and wherein an emitter terminal of the first transistor and an emitter terminal of the second transistor are connected to each other and to a current source, wherein the current source is dimensioned to a predetermined amount of current per MOSFET in the electronic circuit so as to limit a voltage drop over each of first and second resistors at gate terminals of the first and second MOSFETs.