# US 12,119,809 B1 · Driver circuits for gallium nitride half bridge power converters

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- Number: US 12,119,809 B1
- Document ID: US12119809B1
- Status: Granted
- Kind: B1
- Application number: 17/571,395
- Filed: 2022-01-07
- Granted: 2024-10-15
- Earliest claimed: 2021-01-12
- Assignees: Navitas Semiconductor Limited
- Applicants: Navitas Semiconductor Limited
- Inventors: Santosh Sharma
- Web page: https://patentgrep.com/patent/US12119809B1

## CPC

- H03K 17/063: {in field-effect transistor switches}
- H02M 1/0006: {Arrangements for supplying an adequate voltage to the control circuit of converters}
- H02M 1/08: Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
- H02M 1/088: for the simultaneous control of series or parallel connected semiconductor devices
- H02M 3/158: including plural semiconductor devices as final control devices for a single load
- H02M 3/003: {Constructional details, e.g. physical layout, assembly, wiring or busbar connections}
- H03K 2217/0063: High side switches, i.e. the higher potential [DC] or life wire [AC] being directly connected to the switch and not via the load
- H03K 2217/0072: Low side switches, i.e. the lower potential [DC] or neutral wire [AC] being directly connected to the switch and not via the load
- H03K 2217/0081: Power supply means, e.g. to the switch driver
- H03K: PULSE TECHNIQUE (measuring pulse characteristics G01R; modulating sinusoidal oscillations with pulses H03C; transmission of digital information H04L; discriminator circuits detecting phase difference between two signals by counting or integrating cycles of oscillation H03D3/04; automatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses where the type of generator is irrelevant or unspecified H03L; coding, decoding or code conversion, in general H03M)
- H02M: APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF (transformers H01F; dynamo-electric converters H02K47/00; controlling transformers, reactors or choke coils, control or regulation of electric motors, generators or dynamo-electric converters H02P)

## Abstract

A driver circuit is disclosed. The driver circuit is configured to generate a drive voltage for driving a bootstrap transistor. The driver circuit includes an input node and an output node, a first circuit including a plurality of switches, a first capacitor and a second capacitor, and a pass gate switch coupled between the output node and the first capacitor. In one aspect, the first circuit, the first and second capacitors and the pass gate switch are arranged to cause an output voltage at the output node to change from a first output voltage to a second output voltage. In another aspect, a resistor is connected between the first capacitor and the second capacitor, and a feedback switch is connected in parallel to the resistor. The feedback switch is turned on in response to a feedback signal, thereby reducing an impedance value of the resistor.

## Claims

### Claim 1

A driver circuit comprising:
an input for receiving an input signal;
an output for transmitting a drive signal;
a first switch having a first source, a first drain and a first gate, wherein the first gate is coupled to a circuit node, the first drain is coupled to a first voltage source and the first source is coupled to the circuit node via a capacitor;
a resistor coupled between the first gate and the circuit node;
a second switch coupled between the first gate and the circuit node;
a feedback signal generator circuit coupled to the second switch; and
a third switch having a third source, a third drain and a third gate, wherein the third source is coupled to the circuit node, the third gate is directly coupled to the feedback signal generator circuit and the third drain is coupled to the output.

### Claim 2 (depends on 1)

The driver circuit of claim 1, further comprising a fourth switch coupled between the first source and a ground.

### Claim 3 (depends on 2)

The driver circuit of claim 2, further comprising a fifth switch coupled between a second voltage source and the capacitor.

### Claim 4 (depends on 3)

The driver circuit of claim 3, further comprising a sixth switch coupled between the first gate and the ground.

### Claim 5 (depends on 4)

The driver circuit of claim 4, wherein a gate of the fourth switch is coupled to a gate of the sixth switch.

### Claim 6 (depends on 5)

The driver circuit of claim 5, wherein the gate of the fourth switch and the gate of the sixth switch are coupled to the input.

### Claim 7 (depends on 6)

The driver circuit of claim 6, wherein the circuit node is a first circuit node, and wherein the first circuit node is coupled to a second circuit node, the second circuit node coupled to the third gate via the feedback signal generator circuit.

### Claim 8

A method of operating a driver circuit, the method comprising:
providing a driver circuit, the driver circuit comprising:
an input node and an output node;
a first switch having a first source, a first drain and a first gate, wherein the first gate is coupled to a first node, the first drain is coupled to a first voltage source and the first source is coupled to a second node, the second node coupled to a third node via a capacitor;
a resistor coupled between the third node and the first node;
a second switch coupled between the third node and the first node;
a feedback signal generator circuit coupled to the second switch;
a third switch having a third source, a third drain and a third gate, wherein the third source is coupled to the third node, the third gate is coupled to the feedback signal generator circuit and the third drain is coupled to the output node;
receiving an input signal at the input node; and
generating an output signal at the output node in response to receiving the input signal at the input node, the driver circuit operating in at least three states comprising:
wherein in a first state the capacitor is coupled between a second voltage source having a second voltage and a ground causing the capacitor to charge to the second voltage;
wherein in a second state a charge on the capacitor causes the first switch to transition to an on state; and
wherein in a third state the feedback signal generator circuit turns on the third switch, thereby connecting the third node to the output node.

### Claim 9 (depends on 8)

The method of claim 8, wherein the driver circuit further comprises a fourth switch coupled between the second node and the ground.

### Claim 10 (depends on 9)

The method of claim 9, wherein the driver circuit further comprises a fifth switch coupled between the third node and the second voltage source.

### Claim 11 (depends on 10)

The method of claim 10, wherein in the first state the fourth switch is in an on state, the first switch is on an off state, the fifth switch is in an on state, such that the capacitor is coupled between the second voltage source and the ground causing the capacitor to charge to the second voltage.

### Claim 12 (depends on 11)

The method of claim 11, wherein in the second state the fourth and fifth switches transition to an off state, such that a charge on the capacitor causes the first switch to transition to an on state.

### Claim 13 (depends on 12)

The method of claim 12, wherein in the second state a value of a voltage at the first node increases.

### Claim 14 (depends on 13)

The method of claim 13, wherein a transitioning of the first switch to an on state causes the second node to follow the first node, thereby causing a value of a voltage at the second node to increase.

### Claim 15 (depends on 14)

The method of claim 14, wherein an increase of the value of the voltage at the second node causes an increase of a voltage value at the third node.

### Claim 16

A driver circuit comprising:
an input for receiving an input signal;
an output for transmitting a drive signal;
a first switch having a first source, a first drain and a first gate, wherein the first gate is coupled to a circuit node, the first drain is coupled to a first voltage source and the first source is coupled to the circuit node via a capacitor;
a resistor coupled between the first gate and the circuit node;
a pass gate switch control circuit; and
a second switch having a second source, a second drain and a second gate, wherein the second source is coupled to the circuit node, the second gate is directly coupled to the pass gate switch control circuit and the second drain is coupled to the output.

### Claim 17 (depends on 16)

The driver circuit of claim 16, further comprising a third switch coupled between the first source and a ground.

### Claim 18 (depends on 17)

The driver circuit of claim 17, further comprising a fourth switch coupled between a second voltage source and the capacitor.

### Claim 19 (depends on 18)

The driver circuit of claim 18, further comprising a fifth switch coupled between the first gate and the ground.

### Claim 20 (depends on 19)

The driver circuit of claim 19, wherein a gate of the third switch is coupled to a gate of the fifth switch.
