# US 12,119,805 B2 · Substrate processing and membrane release of transversely-excited film bulk acoustic resonator using a sacrificial tub

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- Number: US 12,119,805 B2
- Document ID: US12119805B2
- Status: Granted
- Kind: B2
- Application number: 17/548,234
- Filed: 2021-12-10
- Published: 2022-03-31
- Granted: 2024-10-15
- Earliest claimed: 2018-06-15
- Assignees: Murata Manufacturing Co., Ltd.
- Applicants: Murata Manufacturing Co., Ltd.
- Inventors: Albert Cardona; Douglas Jachowski; Chris O'Brien
- Web page: https://patentgrep.com/patent/US12119805B2

## CPC

- H03H 9/02228: {Guided bulk acoustic wave devices or Lamb wave devices having interdigital transducers situated in parallel planes on either side of a piezoelectric layer}
- H03H 3/02: for the manufacture of piezoelectric or electrostrictive resonators or networks (H03H3/08 takes precedence)
- H03H 3/04: for obtaining desired frequency or temperature coefficient
- H03H 9/02015: {Characteristics of piezoelectric layers, e.g. cutting angles}
- H03H 9/02031: {consisting of ceramic}
- H03H 9/02157: {Dimensional parameters, e.g. ratio between two dimension parameters, length, width or thickness}
- H03H 9/132: {characterized by a particular shape}
- H03H 9/174: {Membranes}
- H03H 9/176: {consisting of ceramic material (H03H9/177, H03H9/178 take precedence)}
- H03H 9/562: {comprising a ceramic piezoelectric layer}
- H03H 9/564: {implemented with thin-film techniques}
- H03H 9/568: {consisting of a ladder configuration}
- H03H 2003/023: {the resonators or networks being of the membrane type}
- H03H 2003/0442: {of a non-piezoelectric layer}
- H03H: IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS (waveguides, resonators, lines or other devices of the waveguide type H01P)

## Abstract

An acoustic resonator device is formed using a sacrificial layer and a front side etched cavity by forming a recess in a silicon substrate with a trap-rich top layer and filling the recess with sacrificial silicon nitride. A bonding oxide (BOX) layer is formed over the trap-rich layer and the sacrificial silicon nitride filled recess and a piezoelectric plate is bonded to the BOX layer. The sacrificial silicon nitride is then removed to form a cavity by using an etchant introduced through holes in the piezoelectric plate and BOX layer without removing the BOX layer from over the cavity.

## Claims

### Claim 1

A method of forming a filter device using a sacrificial layer and a front side etched cavity comprising:
forming a recess in a silicon substrate with a trap-rich top layer;
filling the recess with sacrificial silicon nitride;
forming a bonding oxide (BOX) layer over the trap-rich layer and the sacrificial silicon nitride filled recess;
bonding a piezoelectric plate to the BOX layer; and
removing the sacrificial silicon nitride using an etchant introduced through holes in the piezoelectric plate and BOX layer to form a cavity without removing the BOX layer from over the cavity.

### Claim 2 (depends on 1)

The method of claim 1, wherein:
forming the recess in the silicon substrate includes patterning the top of the trap-rich top layer and front side etching through the trap-rich top layer and into the substrate; and
wherein removing the silicon nitride comprises using an isotropic Phosphoric acid etch through the holes to remove the silicon nitride but not the BOX layer.

### Claim 3 (depends on 1)

The method of claim 1, wherein removing the silicon nitride includes front side releasing a portion of the piezoelectric plate over the cavity to form a diaphragm spanning the cavity.

### Claim 4 (depends on 3)

The method of claim 3, further comprising:
forming a conductor pattern on a front surface of the piezoelectric plate, wherein the conductor pattern includes an interdigital transducer (IDT) with interleaved fingers disposed on the diaphragm over the cavity; and
forming a frontside dielectric on the front surface of the piezoelectric plate, wherein a thickness of the frontside dielectric is equal to a thickness of the BOX layer.

### Claim 5 (depends on 4)

The method of claim 4, wherein filling the recess includes depositing a blanket layer of silicon nitride material over the recess and trap-rich top layer, then polishing the blanket layer silicon nitride.

### Claim 6 (depends on 4)

The method of claim 4, wherein:
the piezoelectric plate and the IDT are configured such that radio frequency signals applied to the IDT excite a primary shear acoustic mode in the piezoelectric plate over the cavity; and wherein a combined thickness of the diaphragm, of the frontside dielectric and of the BOX layer are selected to tune the primary shear acoustic modes in the piezoelectric plate.

### Claim 7 (depends on 4)

The method of claim 4, wherein the thickness of the frontside dielectric and the thickness of the BOX layer are each between 50-200 nm and a thickness of the piezoelectric plate is between 500 nm to 1000 nm; and wherein the thicknesses of the frontside dielectric and the thickness of the BOX layer are each less than half of thickness of the piezoelectric plate.

### Claim 8 (depends on 1)

The method of claim 1, wherein the substrate is Si, the BOX layer is SiO2, the IDT is metal, and the piezoelectric plate is one of lithium niobate or lithium tantalate; and wherein the cavity has a rectangular shape without a more shallow vertical depth in the center.

### Claim 9 (depends on 1)

The method of claim 1, wherein the substrate is a polymorphic or crystalline silicon (Si) material having a thickness of 250-500 um;
the silicon nitride is a sacrificial tub having a predefined volume in the trap-rich layer and substrate, and has a thickness of between 1 and 10 μm thick;
the BOX layer is an SiO2 layer having a thickness of 50-200 nm; and
the trap-rich layer is a polysilicon electrically insulating layer having a thickness of 1-10 um.

### Claim 10 (depends on 1)

The method of claim 1, wherein forming the recess includes patterning and etching an area of the trap-rich layer and substrate to a desired depth of the cavity;
wherein forming the silicon nitride includes filling the recess with a sacrificial tub of material; and
wherein removing the silicon nitride comprises etching away the sacrificial tub with a selective etchant that etches the sacrificial tub through the holes but does not etch the plate, the BOX layer or trap-rich layer.

### Claim 11

A method of forming a filter device using a sacrificial layer and a front side etched cavity comprising:
forming a recess in a silicon substrate;
filling the recess with a sacrificial layer;
forming a bonding oxide (BOX) layer over the substrate and the sacrificial layer filled in the recess;
bonding a piezoelectric plate to the BOX layer;
removing the sacrificial layer using an etchant introduced through holes in the piezoelectric plate and BOX layer to form a cavity without removing the BOX layer from over the cavity; and
forming a frontside dielectric over the plate.

### Claim 12 (depends on 11)

The method of claim 11, wherein
the front-side dielectric layer and the BOX layer are the same material, and
a thickness tfd of the front-side dielectric layer and a thickness tbd of the BOX layer satisfy the relationship 0.5 tfd<tbd<1.5 tfd.

### Claim 13 (depends on 11)

The method of claim 11, wherein the front-side dielectric layer and the BOX layer are silicon dioxide dielectric layers; and tfd and tbd are 145 nm, or 0.326 times the thickness of the piezoelectric plate.

### Claim 14 (depends on 11)

The method of claim 11, wherein:
forming the recess in the silicon substrate includes patterning a top of a trap-rich top layer of the substrate and front side etching through the trap-rich top layer and into the substrate; and
wherein removing the sacrificial layer includes front side releasing a portion of the piezoelectric plate over the cavity to form a diaphragm spanning the cavity.

### Claim 15 (depends on 11)

The method of claim 11, further comprising:
forming a conductor pattern on a front surface of the piezoelectric plate, wherein the conductor pattern includes an interdigital transducer (IDT) with interleaved fingers disposed on the diaphragm over the cavity.

### Claim 16 (depends on 15)

The method of claim 15, wherein the IDT fingers are aluminum and the front-side dielectric layer and BOX layer are silicon dioxide, and wherein a thickness tm of the fingers is equal to a thickness of the front-side dielectric layer which is equal to a thickness of the BOX layer.

### Claim 17

A method of forming a filter device using a sacrificial layer and a front side etched cavity comprising:
forming a recess in a silicon substrate;
filling the recess with a sacrificial layer;
forming a bonding oxide (BOX) layer over the substrate and on the sacrificial layer in the recess;
bonding a piezoelectric plate to the BOX layer;
forming a conductor pattern on a front surface of the piezoelectric plate, wherein the conductor pattern includes an interdigital transducer (IDT) with interleaved fingers disposed over the recess;
removing the sacrificial layer using an etchant introduced through holes in the piezoelectric plate and BOX layer to form a cavity where the sacrificial layer was removed without removing the BOX layer from over the cavity; and
forming a frontside dielectric over the plate.

### Claim 18 (depends on 17)

The method of claim 17, wherein forming the sacrificial layer includes blanket layer depositing silicon nitride material over the recess and substrate, then polishing the blanket layer silicon nitride.

### Claim 19 (depends on 17)

The method of claim 17, wherein:
the piezoelectric plate and the IDT are configured such that radio frequency signals applied to the IDT excite a primary shear acoustic mode in the piezoelectric plate over the cavity; and wherein a combined thickness of the diaphragm, of the frontside dielectric and of the BOX layer are selected to tune the primary shear acoustic modes in the piezoelectric plate.

### Claim 20 (depends on 17)

The method of claim 17, wherein the thickness of the frontside dielectric and the thickness of the BOX layer are each between 50-200 nm and a thickness of the piezoelectric plate is between 500 nm to 1000 nm; and wherein the thicknesses of the frontside dielectric and the thickness of the BOX layer are each less than half of thickness of the piezoelectric plate.