# US 12,119,752 B2 · Alternating asymmetrical phase-shift modulation

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- Number: US 12,119,752 B2
- Document ID: US12119752B2
- Status: Granted
- Kind: B2
- Application number: 17/806,085
- Filed: 2022-06-09
- Published: 2022-12-15
- Granted: 2024-10-15
- Earliest claimed: 2021-06-09
- Assignees: Delta Electronics (Thailand) Public Co., Ltd.
- Applicants: Delta Electronics (Thailand) Public Co., Ltd.
- Inventors: Philipp Rehlaender; Joachim Böcker; Roland Unruh; Frank Schafmeister
- Web page: https://patentgrep.com/patent/US12119752B2

## CPC

- H02M 1/083: {for the ignition at the zero crossing of the voltage or the current}
- H02M 3/33573: {Full-bridge at primary side of an isolation transformer}
- H02M 1/0043: {Converters switched with a phase shift, i.e. interleaved (non-isolated DC/DC converters H02M3/1586)}
- H02M 1/0054: {Transistor switching losses (periodically suspending operation of switching converter in low power mode H02M1/0035)}
- H02M 1/0058: {by employing soft switching techniques, i.e. commutation of transistors when applied voltage is zero or when current flow is zero (using an auxiliary actively switched resonant commutation circuit connected to an intermediate DC voltage or between two push-pull branches of an inverter bridge H02M7/4811; in resonant inverters H02M7/4815; in inverters operating from a resonant DC source H02M7/4826)}
- H02M 3/33523: {with galvanic isolation between input and output of both the power stage and the feedback loop}
- H02M 3/3376: {with automatic control of output voltage or current}
- H02M 7/219: in a bridge configuration
- H02M 3/01: {Resonant DC/DC converters}
- Y02B 70/10: Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
- H02M: APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF (transformers H01F; dynamo-electric converters H02K47/00; controlling transformers, reactors or choke coils, control or regulation of electric motors, generators or dynamo-electric converters H02P)
- Y02B: CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS

## Abstract

In order to balance the thermal stress of the switches (S1-S4) of the two legs of an inverter full bridge (4), the driving signals are generated using an up-down counter having a modulation period Tmod of twice the period T of the input voltage (Vin). The up-down counter has a first compare value (41) of D/4 and a second compare value (42) of (2+D)/4, where D is the duty cycle and where the second half bridge is phase shifted by the period T.

## Claims

### Claim 1

A method for controlling a converter comprising an inverter full bridge with a first input terminal, a second input terminal, a first half bridge and a second half bridge connected across the first and second input terminals, wherein a input voltage having a period T is provided between the first and second input terminals, wherein each half bridge comprises a first switch and a second switch connected in series between the first and second input terminals, comprising:
generating drive signals for the switches with a pulse width modulation technique with a duty cycle D using an up-down counter having a period Tmod being twice the period T, a first compare value for the first half bridge and a second compare value for the first half bridge,
switching a first switch of the first half bridge ON at the first compare value for the first half bridge on an up-count of the up-down counter, switching the first switch of the first half bridge OFF at the second compare value for the first half bridge on an up-count of the up-down counter,
switching the first switch of the first half bridge ON at the second compare value for the first half bridge on a down-count of the up-down counter, switching the first switch of the first half bridge OFF at the first compare value for the first half bridge on the down-count of the up-down counter, and
switching a second switch of the first half bridge interleaved to the first switch of the first half bridge,
wherein the first compare value for the first half bridge is D/4 and wherein the second compare value for the first half bridge is (2+D)/4.

### Claim 2 (depends on 1)

The method according to claim 1, comprising:
switching a first switch of the second half bridge ON at a first compare value for the second half bridge on an up-count of the up-down counter, switching the first switch of the second half bridge OFF at a second compare value for the second half bridge on an up-count of the up-down counter,
switching the first switch of the second half bridge ON at the second compare value for the second half bridge on a down-count of the up-down counter, switching the first switch of the second half bridge OFF at the first compare value for the second half bridge on the down-count of the up-down counter, and
switching a second switch of the second half bridge interleaved to the first switch of the second half bridge,
wherein the first compare value for the second half bridge is (1−D/4) and wherein the second compare value for the second half bridge is (1−(2+D)/4).

### Claim 3 (depends on 2)

The method according to claim 2, wherein the up-down counter is ramped up from a minimum value to a maximum value during a first half of the modulator period Tmod and then is ramped down from the maximum value to the minimum value during a second half of the modulator period Tmod, wherein the minimum value is zero and the maximum value is 1.

### Claim 4 (depends on 1)

The method according to claim 1, wherein the up-down counter is ramped up from a minimum value to a maximum value during a first half of the modulator period Tmod and then is ramped down from the maximum value to the minimum value during a second half of the modulator period Tmod, wherein the minimum value is zero and the maximum value is 1.

### Claim 5

A converter comprising an inverter full bridge with a first input terminal, a second input terminal, a first half bridge and a second half bridge connected across the first and second input terminals, wherein each half bridge comprises a first switch and a second switch connected in series between the first and second input terminals, a drive signal generator for generating drive signals for the switches with a pulse width modulation technique with a duty cycle D, wherein the drive signal generator comprises an up-down counter having a first compare value for the first half bridge, a second compare value for the first half bridge and a period Tmod being twice a period T of an input voltage for providing between the first and second input terminals, wherein the drive signal generator is adapted for generating drive signals for:
switching a first switch of the first half bridge ON at the first compare value for the first half bridge on an up-count of the up-down counter, switching the first switch of the first half bridge OFF at the second compare value for the first half bridge on an up-count of the up-down counter,
switching the first switch of the first half bridge ON at the second compare value for the first half bridge on a down-count of the up-down counter, switching the first switch of the first half bridge OFF at the first compare value for the first half bridge on the down-count of the up-down counter, and
switching a second switch of the first half bridge interleaved to the first switch of the first half bridge,
wherein the first compare value for the first half bridge is D/4 and wherein the second compare value for the first half bridge is (2+D)/4.

### Claim 6 (depends on 5)

The converter according to claim 5, further comprising a transformer, a converter stage connected between the inverter full bridge and a primary side of the transformer, a rectifier connected to a secondary side of the transformer and an output stage connected to the rectifier, wherein an output power of the converter is provided across an output of the output stage.

### Claim 7 (depends on 6)

The converter according to claim 6, wherein the converter stage comprises an LLC resonant tank.

### Claim 8 (depends on 7)

The converter according to claim 7, wherein the rectifier comprises a synchronous rectifier.

### Claim 9 (depends on 7)

The converter according to claim 7, wherein the rectifier comprises a diode full bridge rectifier.

### Claim 10 (depends on 7)

The converter according to claim 7, wherein the output stage comprises an output filter with a capacitor connected between output terminals of the rectifier.

### Claim 11 (depends on 7)

The converter according to claim 7, wherein the switches of the inverter full bridge comprise a MOSFET.

### Claim 12 (depends on 6)

The converter according to claim 6, wherein the converter stage comprises a series inductor and an inductor, wherein the series inductor is connected in series between the inverter full bridge and the transformer and the inductor is connected in parallel to the transformer.

### Claim 13 (depends on 12)

The converter according to claim 12, wherein the rectifier comprises a synchronous rectifier.

### Claim 14 (depends on 12)

The converter according to claim 12, wherein the rectifier comprises a diode full bridge rectifier.

### Claim 15 (depends on 12)

The converter according to claim 12, wherein the output stage comprises an output filter with a capacitor connected between output terminals of the rectifier.

### Claim 16 (depends on 6)

The converter according to claim 6, wherein the rectifier comprises a synchronous rectifier.

### Claim 17 (depends on 16)

The converter according to claim 16, wherein the synchronous rectifier comprises a first controllable rectifier switch connected to a first output terminal of the transformer, a second controllable rectifier switch connected to a second output terminal of the transformer, wherein both controllable rectifier switches are connected to a first output terminal of the rectifier and wherein the secondary of the transformer comprises a center-tap connected to a second output terminal of the rectifier.

### Claim 18 (depends on 6)

The converter according to claim 6, wherein the rectifier comprises a diode full bridge rectifier.

### Claim 19 (depends on 6)

The converter according to claim 6, wherein the output stage comprises an output filter with a capacitor connected between output terminals of the rectifier.

### Claim 20 (depends on 6)

The converter according to claim 6, wherein the switches of the inverter full bridge comprise a MOSFET.