# US 12,119,739 B2 · Integrated power device with energy harvesting gate driver

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- Number: US 12,119,739 B2
- Document ID: US12119739B2
- Status: Granted
- Kind: B2
- Application number: 17/853,746
- Filed: 2022-06-29
- Published: 2023-01-05
- Granted: 2024-10-15
- Earliest claimed: 2021-07-01
- Assignees: Navitas Semiconductor Limited
- Applicants: Navitas Semiconductor Limited
- Inventors: Marco Giandalia; Jason Zhang; Hongwei Jia; Daniel M. Kinzer
- Web page: https://patentgrep.com/patent/US12119739B2

## CPC

- H02M 1/08: Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
- G05F 1/573: with overcurrent detector
- H02M 1/32: Means for protecting converters other than automatic disconnection
- H02M 3/155: using semiconductor devices only
- H02M 3/158: including plural semiconductor devices as final control devices for a single load
- H02M 7/003: {Constructional details, e.g. physical layout, assembly, wiring or busbar connections}
- H03K 3/012: Modifications of generator to improve response time or to decrease power consumption
- H02H 9/02: responsive to excess current {(current limitation for voltage regulators G05F1/573; disconnection after limiting H02H3/025)}
- H03K 2217/0081: Power supply means, e.g. to the switch driver
- H10W 72/07554: {changes in dispositions}
- H10W 72/5445: {being orthogonal to a side surface of the chip, e.g. parallel arrangements}
- H10W 72/547: {Dispositions of multiple bond wires}
- H10W 72/5475: {multiple bond wires connected to common bond pads at both ends of the wires}
- H10W 90/753: {between laterally-adjacent chips}
- H10W 90/756: {between a chip and a stacked lead frame, conducting package substrate or heat sink}
- Y02B 70/10: Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
- H02M: APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF (transformers H01F; dynamo-electric converters H02K47/00; controlling transformers, reactors or choke coils, control or regulation of electric motors, generators or dynamo-electric converters H02P)
- G05F: SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- H03K: PULSE TECHNIQUE (measuring pulse characteristics G01R; modulating sinusoidal oscillations with pulses H03C; transmission of digital information H04L; discriminator circuits detecting phase difference between two signals by counting or integrating cycles of oscillation H03D3/04; automatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses where the type of generator is irrelevant or unspecified H03L; coding, decoding or code conversion, in general H03M)
- H02H: EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS (indicating or signalling undesired working conditions G01R, e.g. G01R31/00, G08B; locating faults along lines G01R31/08; emergency protective devices H01H)
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- Y02B: CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS

## Abstract

An electronic circuit is disclosed. The electronic circuit includes a transistor having a gate terminal, a source terminal and a drain terminal, and a gate driver circuit including a pull-down transistor coupled to the gate terminal, and an input terminal arranged to receive an input signal and generate a corresponding output signal at an output terminal coupled to the gate terminal, where the gate driver circuit is arranged to store energy harvested from the input signal and use the stored energy to change a conductive state of the pull-down transistor. In one aspect, the transistor includes gallium nitride (GaN). In another aspect, the pull-down transistor includes GaN.

## Claims

### Claim 1

An electronic circuit comprising:
a transistor including a gate terminal, a source terminal and a drain terminal; and
a gate driver circuit including:
a pull-down transistor coupled to the gate terminal;
an input terminal arranged to receive an input signal and generate a corresponding output signal at an output terminal coupled to the gate terminal;
a pull-up transistor, wherein the input terminal is coupled to a collector terminal of the pull-up transistor; and
wherein the gate driver circuit is arranged to store energy harvested from the input signal through the pull-up transistor and use the stored energy to change a conductive state of the pull-down transistor.

### Claim 2 (depends on 1)

The electronic circuit of claim 1, wherein the transistor comprises gallium nitride (GaN).

### Claim 3 (depends on 2)

The electronic circuit of claim 2, wherein the pull-down transistor comprises GaN.

### Claim 4 (depends on 1)

The electronic circuit of claim 1, wherein the gate driver circuit comprises silicon.

### Claim 5 (depends on 1)

The electronic circuit of claim 1, wherein the gate driver circuit uses the stored energy to transition the pull-down transistor from an on state to an off state.

### Claim 6 (depends on 1)

The electronic circuit of claim 1, wherein the gate driver circuit and the transistor are disposed within a unitary electronic package.

### Claim 7 (depends on 1)

The electronic circuit of claim 1, wherein the input signal is a pulse width modulated (PWM) signal comprising a series of on and off commands.

### Claim 8 (depends on 7)

The electronic circuit of claim 7, wherein the gate driver circuit is arranged to change the conductive state of the pull-down transistor from an off state to an on state during an off command of the PWM signal.

### Claim 9 (depends on 6)

The electronic circuit of claim 6, wherein the unitary electronic package comprises a first, a second and a third external contact.

### Claim 10 (depends on 1)

The electronic circuit of claim 1, wherein the transistor and the gate driver circuit are disposed within a TO-247 package.

### Claim 11 (depends on 6)

The electronic circuit of claim 6, wherein the unitary electronic package is a TO-leadless (TOLL) package.

### Claim 12 (depends on 7)

The electronic circuit of claim 7, wherein the gate driver circuit comprises an energy harvesting circuit coupled to the gate terminal, and wherein the energy harvesting circuit is arranged to store energy harvested from the input signal and use the stored energy for operation of the gate driver circuit when the PWM signal is in an off command.

### Claim 13 (depends on 9)

The electronic circuit of claim 9, wherein the first external contact is a power input contact, the second external contact is a power output contact, and the third external contact is an input signal contact.