# US 12,119,576 B2 · Press-fit power module and related methods > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,119,576 B2 - Document ID: US12119576B2 - Status: Granted - Kind: B2 - Application number: 17/064,663 - Filed: 2020-10-07 - Published: 2021-01-21 - Granted: 2024-10-15 - Earliest claimed: 2018-01-09 - Assignees: Semiconductor Components Industries, LLC - Applicants: Semiconductor Components Industries, LLC - Inventors: Jie Chang; Huibin Chen; Tiburcio Maldo; Keunhyuk Lee - Web page: https://patentgrep.com/patent/US12119576B2 ## CPC - H01R 12/585: {Terminals having a press fit or a compliant portion and a shank passing through a hole in the printed circuit board} - H01R 13/03: characterised by the material, e.g. plating, or coating materials - H05K 3/308: {Adaptations of leads (connectors to printed circuits H01R12/00)} - H10W 70/421: {Shapes or dispositions} - H10W 70/429: {being the outer leads} - H10W 70/456: {Materials} - H10W 70/464: {Additional interconnections in combination with leadframes} - H10W 90/701: {characterised by the relative positions of pads or connectors relative to package parts} - H05K 2201/1059: Connections made by press-fit insertion - H05K 2201/10946: Leads attached onto leadless component after manufacturing the component - H01R: ELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS - H05K: PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS - H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10 ## Abstract Implementations of semiconductor packages may include: one or more die electrically coupled to a lead frame. The lead frame may be included within a housing. The semiconductor package may also include a set of signal leads extending from the housing, a set of power leads extending from the housing, and a plurality of press fit pins each fixedly coupled to the set of signal leads and the set of power leads. The set of signal leads and the set of power leads may be configured to couple with a substrate. ## Claims ### Claim 1 A method of manufacturing a semiconductor package, the method comprising: providing a power module comprising a first set of leads on a first side and a second set of leads on a second side; trimming a length of the first set of leads and a length of the second set of leads; one of welding, soldering, or brazing a press fit pin to each lead of the first set of leads and to each lead of the second set of leads to form a plurality of press fit pins; and bending the first set of leads and the second set of leads to a desired angle configured to couple with a substrate. ### Claim 2 (depends on 1) The method of claim 1, wherein the press fit pin is a singulated press fit pin. ### Claim 3 (depends on 1) The method of claim 1, wherein the press fit pin is a framed press fit pin. ### Claim 4 (depends on 1) The method of claim 1, further comprising singulating the plurality of press fit pins from a frame after the one of welding, soldering, or brazing. ### Claim 5 (depends on 1) The method of claim 1, wherein the one of welding, soldering, or brazing are one of ultrasonic welding, laser welding, ultrasonic soldering, ultrasonic brazing, or laser brazing. ### Claim 6 (depends on 1) The method of claim 1, further comprising coupling a lead supporter to the first set of leads, the second set of leads, and to the power module where the lead supporter is configured to prevent deformation of the first set of leads and the second set of leads. ### Claim 7 (depends on 1) The method of claim 1, wherein the first set of leads and the second set of leads comprise 99.9% purity copper and the plurality of press fit pins comprise a CuCrAgFeTiSi alloy. ### Claim 8 A method of manufacturing a semiconductor package, the method comprising: providing a power module comprising a first set of leads on a first side and a second set of leads on a second side; coupling a plurality of press fit pins into a jig; coupling a portion of each lead of the first set of leads into the jig; coupling a portion of each lead of the second set of leads into the jig; one of welding, soldering, or brazing a press fit pin of the plurality of press fit pins to each lead of the first set of leads and to each lead of the second set of leads; and bending the first set of leads and the second set of leads to a desired angle configured to couple with a substrate. ### Claim 9 (depends on 8) The method of claim 8, wherein the press fit pin is a singulated press fit pin. ### Claim 10 (depends on 8) The method of claim 8, wherein the press fit pin is a framed press fit pin. ### Claim 11 (depends on 8) The method of claim 8, further comprising singulating the plurality of press fit pins from a frame after the one of welding, soldering, or brazing. ### Claim 12 (depends on 8) The method of claim 8, wherein the one of welding, soldering, or brazing are one of ultrasonic welding, laser welding, ultrasonic soldering, ultrasonic brazing, or laser brazing. ### Claim 13 (depends on 8) The method of claim 8, further comprising coupling a lead supporter to the first set of leads, the second set of leads, and to the power module where the lead supporter is configured to prevent deformation of the first set of leads and the second set of leads. ### Claim 14 (depends on 8) The method of claim 8, wherein the first set of leads and the second set of leads comprise 99.9% purity copper and the plurality of press fit pins comprise a CuCrAgFeTiSi alloy. ### Claim 15 A method of manufacturing a semiconductor package, the method comprising: providing one or more die electrically coupled to a leadframe, the leadframe comprised within a housing, the leadframe comprising a first set of leads extending from the housing and a second set of leads extending from the housing opposite the first set of leads; trimming a length of the first set of leads and a length of the second set of leads; one of welding, soldering, or brazing a press fit pin to each lead of the first set of leads and to each lead of the second set of leads to form a plurality of press fit pins; and bending the first set of leads and the second set of leads to a desired angle configured to couple with a substrate. ### Claim 16 (depends on 15) The method of claim 15, wherein the semiconductor package is a power module. ### Claim 17 (depends on 15) The method of claim 15, wherein the plurality of press fit pins are coupled to the first set of leads and the second set of leads through either one of welding, soldering, or brazing using a jig. ### Claim 18 (depends on 15) The method of claim 15, wherein the first set of leads comprises signal leads on a first side of the housing and the second set of leads comprises power leads on a second side of the housing opposing the first side. ### Claim 19 (depends on 15) The method of claim 15, wherein the leadframe comprises 99.9% purity copper. ### Claim 20 (depends on 15) The method of claim 15, wherein the plurality of press fit pins comprise a CuCrAgFeTiSi alloy.