# US 12,119,414 B2 · Semiconductor trench capacitor structure and manufacturing method thereof

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- Number: US 12,119,414 B2
- Document ID: US12119414B2
- Status: Granted
- Kind: B2
- Application number: 18/327,869
- Filed: 2023-06-01
- Published: 2023-09-28
- Granted: 2024-10-15
- Earliest claimed: 2021-08-30
- Assignees: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicants: Taiwan Semiconductor Manufacturing Company Ltd.
- Inventors: Fu-Chiang Kuo
- Web page: https://patentgrep.com/patent/US12119414B2

## CPC

- H10D 1/665: {Trench conductor-insulator-semiconductor capacitors, e.g. trench MOS capacitors}
- H10B 12/038: {the capacitor being in a trench in the substrate}
- H10D 1/042: {using deposition processes to form electrode extensions}
- H10D 1/047: {of conductor-insulator-semiconductor capacitors, e.g. trench capacitors}
- H10D 1/68: Capacitors having no potential barriers
- H10D 1/696: {comprising multiple layers, e.g. comprising a barrier layer and a metal layer (barrier layers to prevent diffusion of hydrogen or oxygen in perovskite based capacitors H10D1/688)}
- H10D 1/716: {having vertical extensions}
- H10W 10/0143: {comprising concurrently refilling multiple trenches having different shapes or dimensions}
- H10W 10/17: formed using trench refilling with dielectric materials, e.g. shallow trench isolations
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10B: ELECTRONIC MEMORY DEVICES
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

A semiconductor trench capacitor structure is provided. The semiconductor trench capacitor comprises a semiconductor substrate; a trench capacitor overlying the semiconductor substrate, wherein the trench capacitor comprises a plurality of trench electrodes and a plurality of capacitor dielectric layers that are alternatingly stacked over the semiconductor substrate and defines a plurality of trench segments and a plurality of pillar segments, wherein the trench electrodes and the capacitor dielectric layers are recessed into the semiconductor substrate at the trench segments, and wherein the trench segments are separated from each other by the pillar segments; and a protection dielectric layer disposed between the semiconductor substrate and the trench capacitor, wherein the protection dielectric layer has a thickness greater than thicknesses of the trench electrodes.

## Claims

### Claim 1

A semiconductor structure, comprising:
a semiconductor substrate;
a trench capacitor on the semiconductor substrate and comprising a plurality of capacitor segments extending into the semiconductor substrate and separated from each other by pillar segments, wherein each pillar segment has a T-shape shape, and has two sharp corners at a top portion, and two sidewalls beneath the two sharp corners and perpendicular to the semiconductor substrate; and
a protection dielectric layer disposed between the capacitor segments and the pillar segments and overlying top surfaces of the pillar segments.

### Claim 2 (depends on 1)

The semiconductor structure of claim 1, wherein the protection dielectric layer is disposed in line with the pillar segments.

### Claim 3 (depends on 1)

The semiconductor structure of claim 1, wherein the thickness of the protection dielectric layer is uniform.

### Claim 4 (depends on 1)

The semiconductor structure of claim 1, wherein the thickness of the protection dielectric layer is non-uniform.

### Claim 5 (depends on 4)

The semiconductor structure of claim 4, wherein the thickest thickness of the protection dielectric layer is about twice larger the thinnest thickness of the protection dielectric layer.

### Claim 6 (depends on 1)

The semiconductor structure of claim 1, wherein the protection dielectric layer completely overlies the two sharp corners of the pillar segments.

### Claim 7 (depends on 1)

The semiconductor structure of claim 1, wherein the protection dielectric layer is disposed discontinuously and at least covers the two sharp corners of the pillar segments.

### Claim 8 (depends on 1)

The semiconductor structure of claim 1, wherein each capacitor segment comprises an alternative stack of trench electrode layers and capacitor dielectric layers.

### Claim 9 (depends on 8)

The semiconductor structure of claim 8, wherein the protection dielectric layer has a thickness greater than a half of a thinnest thickness of each of the trench electrode layers.

### Claim 10 (depends on 8)

The semiconductor structure of claim 8, wherein the lowest trench electrode layer is in direct contact with the semiconductor substrate.

### Claim 11 (depends on 1)

The semiconductor structure of claim 1, wherein the sharp corners of the pillar segments extend upwardly.

### Claim 12 (depends on 1)

The semiconductor structure of claim 1, wherein a top surface of the pillar segments are warped at edge portions thereof.

### Claim 13

A semiconductor structure, comprising:
a semiconductor substrate defining a trench, the trench including a top portion having a top width, a bottom portion having a bottom width, and two sidewalls beneath the top portion and perpendicular to the semiconductor substrate, wherein the top width is less than the bottom width;
a protection dielectric layer overlying a top surface of the semiconductor substrate and the two sidewall surfaces of the trench; and
a trench capacitor disposed over the semiconductor substrate and filling the trench, wherein the trench capacitor comprises:
a first trench electrode layer overlying the semiconductor substrate and lining the trench;
a capacitor dielectric layer overlying the first trench electrode layer and lining the trench over the first trench electrode layer; and
a second trench electrode layer overlying the capacitor dielectric layer and filling the trench over the capacitor dielectric layer,
wherein the protection dielectric layer has a thinnest thickness greater than a thinnest thickness of the first trench electrode layer or the second trench electrode layer, and
wherein the first trench electrode layer is in direct contact with the semiconductor substrate.

### Claim 14 (depends on 13)

The semiconductor structure of claim 13, wherein the protection dielectric layer partially overlies the semiconductor substrate and the trench.

### Claim 15 (depends on 13)

The semiconductor structure of claim 13, wherein the thickness of the protection dielectric layer is uniform.

### Claim 16 (depends on 13)

The semiconductor structure of claim 13, wherein the thickness of the protection dielectric layer is non-uniform.

### Claim 17 (depends on 16)

The semiconductor structure of claim 16, wherein the thickest thickness of the protection dielectric layer is about twice larger the thinnest thickness of the protection dielectric layer.

### Claim 18 (depends on 13)

The semiconductor structure of claim 13, wherein the sharp corners of the pillar segments extend upwardly, and a top surface of the pillar segments are warped at edge portions thereof.

### Claim 19

A method of forming a semiconductor device, the method comprising:
providing a semiconductor substrate;
performing an etch into the semiconductor substrate to form a trench, wherein the trench includes a top portion having a top width, a bottom portion having a bottom width, and two sidewalls beneath the top portion and perpendicular to the semiconductor substrate, wherein the top width is less than the bottom width;
forming a protection dielectric layer overlying a top surface of the semiconductor substrate and the two sidewall surfaces of the trench; and
forming a layer stack including at least two trench electrode layers interlaced with a capacitor dielectric layer over the semiconductor substrate and filling the trench;
wherein the protection dielectric layer has a thickness greater than a half of a thinnest thicknesses of the at least two trench electrode layers, and
wherein the lower trench electrode layer is in direct contact with the semiconductor substrate.

### Claim 20 (depends on 19)

The method of claim 19, wherein the thickness of the protection dielectric layer is non-uniform, and a thinnest thickness of the protection dielectric layer is twice greater than the thinnest thickness of the at least two trench electrode layers.