# US 12,119,396 B2 · Semiconductor device > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,119,396 B2 - Document ID: US12119396B2 - Status: Granted - Kind: B2 - Application number: 17/494,639 - Filed: 2021-10-05 - Published: 2022-01-27 - Granted: 2024-10-15 - Earliest claimed: 2018-09-18 - Assignees: Kabushiki Kaisha Toshiba; Toshiba Electronic Devices & Storage Corporation - Applicants: Kabushiki Kaisha Toshiba; Toshiba Electronic Devices & Storage Corporation - Inventors: Yasunobu Saito - Web page: https://patentgrep.com/patent/US12119396B2 ## CPC - H10D 30/4732: {using Group III-V semiconductor material} - H10D 30/475: {having wider bandgap layer formed on top of lower bandgap active layer, e.g. undoped barrier HEMTs such as i-AlGaN/GaN HEMTs} - H10D 30/4755: {having wide bandgap charge-carrier supplying layers, e.g. modulation doped HEMTs such as n-AlGaAs/GaAs HEMTs} - H10D 62/106: {having supplementary regions doped oppositely to or in rectifying contact with regions of the semiconductor bodies, e.g. guard rings with PN or Schottky junctions} - H10D 62/117: {Shapes of semiconductor bodies} - H10D 62/343: {Gate regions of field-effect devices having PN junction gates} - H10D 64/513: {within recesses in the substrate, e.g. trench gates, groove gates or buried gates} - H10D 62/8503: {Nitride Group III-V materials, e.g. AlN or GaN} - H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES ## Abstract According to one embodiment, a semiconductor device comprises a first nitride semiconductor layer on a substrate and a second nitride semiconductor layer on the first nitride semiconductor layer. The second nitride semiconductor layer has a larger bandgap than the first nitride semiconductor layer. Source and drain electrodes are on the second nitride semiconductor layer. A gate electrode is between the source electrode and the drain electrode. A third nitride semiconductor layer of p-type conductivity is on the second nitride semiconductor layer between the drain electrode and the gate electrode and spaced from the drain electrode. ## Claims ### Claim 1 A semiconductor device, comprising: a first nitride semiconductor layer on a substrate; a source electrode on the first nitride semiconductor layer; a drain electrode on the first nitride semiconductor layer; a gate electrode between the source electrode and the drain electrode; a second nitride semiconductor region between the first nitride semiconductor layer and the drain electrode and being a material having a larger bandgap than the first nitride semiconductor layer; a third nitride semiconductor region directly on the first nitride semiconductor layer, a lateral position of the third nitride semiconductor region being between a lateral position of a drain-side edge of the gate electrode and a lateral position of a gate-side edge of the drain electrode, a lateral surface of third nitride semiconductor region directly contacting the second nitride semiconductor region, the third nitride semiconductor region being a material having a bandgap larger than the first nitride semiconductor layer and less than or equal to the material of the second nitride semiconductor region; and a fourth nitride semiconductor region between the first nitride semiconductor layer and the source electrode and being a material having a larger bandgap than the first nitride semiconductor layer and the material of the third nitride semiconductor region, wherein the gate electrode is between the third nitride semiconductor region and the fourth nitride semiconductor region in a direction substantially parallel to a plane of the substrate. ### Claim 2 (depends on 1) The semiconductor device according claim 1, wherein when a width d3 of the third nitride semiconductor region in the direction substantially parallel to the plane of the substrate is subtracted from a shortest distance d1 between the drain electrode and the gate electrode, the difference is within a range of 0.5 μm to 2 μm, endpoint inclusive. ### Claim 3 (depends on 1) The semiconductor device according claim 1, wherein a ratio t1/t3 for a thickness t1 of the second nitride semiconductor region from the first nitride semiconductor layer to an uppermost surface and a thickness t3 of the third nitride semiconductor region from the first nitride semiconductor layer to an uppermost surface is between 1 and 1.7, endpoint inclusive. ### Claim 4 (depends on 1) The semiconductor device according to claim 1, further comprising: an insulating film covering the third nitride semiconductor region, an upper surface of the second nitride semiconductor region, and an upper surface of the fourth nitride semiconductor region, wherein the insulating film is between the gate electrode and the first nitride semiconductor layer, the insulating film is between the gate electrode and the third nitride semiconductor region, and the insulating film is between the gate electrode and the fourth nitride semiconductor region. ### Claim 5 (depends on 4) The semiconductor device according to claim 4, wherein a portion of the insulating film is between a portion of the source electrode and the fourth nitride semiconductor region. ### Claim 6 (depends on 5) The semiconductor device according to claim 5, wherein another portion of the insulating film is between a portion of the drain electrode and the second nitride semiconductor region. ### Claim 7 (depends on 4) The semiconductor device according to claim 4, wherein the insulating film is silicon nitride. ### Claim 8 (depends on 4) The semiconductor device according to claim 4, wherein the insulating film is silicon oxide. ### Claim 9 (depends on 1) The semiconductor device according to claim 1, wherein the second nitride semiconductor region and the fourth nitride semiconductor region are each an aluminum gallium nitride material. ### Claim 10 (depends on 1) The semiconductor device according to claim 1, wherein the gate electrode extends to a position level with a lowermost surface of the third nitride semiconductor region. ### Claim 11 (depends on 1) The semiconductor device according to claim 1, wherein the second and fourth nitride semiconductor regions are each undoped aluminum gallium nitride. ### Claim 12 (depends on 1) The semiconductor device according to claim 1, wherein the second nitride semiconductor region is an aluminum gallium nitride doped with silicon. ### Claim 13 (depends on 1) The semiconductor device according to claim 1, wherein the first nitride semiconductor layer comprises a material with a formula AlXGa1-XN, where X satisfies 0≤X<1, the material of the second nitride semiconductor region comprises a material with a formula AlYGa1-YN, where Y satisfies 0