# US 12,119,384 B2 · Semiconductor device having conductive field plate overlapping an edge of an active region

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- Number: US 12,119,384 B2
- Document ID: US12119384B2
- Status: Granted
- Kind: B2
- Application number: 18/059,701
- Filed: 2022-11-29
- Published: 2023-04-06
- Granted: 2024-10-15
- Earliest claimed: 2013-10-11
- Assignees: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicants: Taiwan Semiconductor Manufacturing Company, Ltd.
- Inventors: Po-Yu Chen; Wan-Hua Huang; Jing-Ying Chen
- Web page: https://patentgrep.com/patent/US12119384B2

## CPC

- H10D 64/111: {Field plates}
- H10D 30/0285: {using formation of insulating sidewall spacers}
- H10D 30/65: Lateral DMOS [LDMOS] FETs
- H10D 62/106: {having supplementary regions doped oppositely to or in rectifying contact with regions of the semiconductor bodies, e.g. guard rings with PN or Schottky junctions}
- H10D 62/126: {Top-view geometrical layouts of the regions or the junctions}
- H10D 64/516: {the thicknesses being non-uniform}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES

## Abstract

A semiconductor device includes an isolation structure in a substrate; and a gate structure over an active region of the substrate. The isolation structure surrounds the active region. The gate structure includes a first section parallel to a second section. The semiconductor device further includes a conductive field plate extending between the first section and the second section and overlapping an edge of the active region. A portion of the conductive field plate extends beyond the edge of the active region, The conductive field plate includes a dielectric layer having a first portion and a second portion, and the first portion is thicker than the second portion. The semiconductor device includes a first well overlapping the edge of the active region. The first well extends underneath the isolation structure. The conductive field plate extends beyond an outer-most edge of the first well.

## Claims

### Claim 1

A semiconductor device comprising:
an isolation structure in a substrate;
a gate structure over an active region of the substrate, wherein the isolation structure surrounds the active region, the gate structure comprising a first section and a second section, and the first section extends parallel to the second section;
a conductive field plate over the substrate, the conductive field plate extending between the first section and the second section and overlapping an edge of the active region, wherein a portion of the conductive field plate extends beyond the edge of the active region, and the conductive field plate comprises a dielectric layer having a first portion and a second portion, and the first portion is thicker than the second portion; and
a first well in the substrate, wherein the first well overlaps the edge of the active region, and the first well extends underneath the isolation structure, and the conductive field plate extends beyond an outer-most edge of the first well.

### Claim 2 (depends on 1)

The semiconductor device of claim 1, wherein the first portion of the dielectric layer extends over the isolation structure.

### Claim 3 (depends on 1)

The semiconductor device of claim 1, wherein the second portion of the dielectric layer extends over the active region.

### Claim 4 (depends on 1)

The semiconductor device of claim 1, wherein an interface between the first portion of the dielectric layer and the second portion of the dielectric layer is over the first well.

### Claim 5 (depends on 1)

The semiconductor device of claim 1, wherein the gate structure comprises a gate dielectric layer, and the gate dielectric layer has a non-uniform thickness.

### Claim 6 (depends on 5)

The semiconductor device of claim 5, wherein the gate dielectric layer comprises a third portion and a fourth portion, wherein the third portion is thicker than the fourth portion.

### Claim 7 (depends on 6)

The semiconductor device of claim 6, wherein the third portion of the gate dielectric layer is closer to the isolation structure than the fourth portion of the gate dielectric layer.

### Claim 8 (depends on 1)

The semiconductor device of claim 1, wherein a thickness of the first portion of the dielectric layer ranges from 20 angstroms to 1,200 angstroms.

### Claim 9

A semiconductor device comprising:
an isolation structure in a substrate;
a gate structure over an active region of the substrate, wherein the isolation structure surrounds the active region, the gate structure comprising a first section and a second section, and the first section extends parallel to the second section;
a conductive field plate over the substrate, the conductive field plate extending between the first section and the second section and overlapping an edge of the active region, wherein a portion of the conductive field plate extends beyond the edge of the active region, and the conductive field plate comprises a conductive layer having a first portion and a second portion, and the first portion is thicker than the second portion; and
a first well in the substrate, wherein the first well overlaps the edge of the active region, and the first well extends underneath the isolation structure, and the conductive field plate extends beyond an outer-most edge of the first well.

### Claim 10 (depends on 9)

The semiconductor device of claim 9, wherein the second portion of the conductive layer extends over the isolation structure.

### Claim 11 (depends on 9)

The semiconductor device of claim 9, wherein the gate structure comprises a gate electrode, and the gate electrode has a non-uniform thickness.

### Claim 12 (depends on 11)

The semiconductor device of claim 11, wherein the gate electrode comprises a third portion and a fourth portion, and the third portion is thicker than the fourth portion.

### Claim 13 (depends on 12)

The semiconductor device of claim 12, wherein the third portion is closer to the active region than the fourth portion.

### Claim 14 (depends on 11)

The semiconductor device of claim 11, wherein a material of the conductive layer is a same material as the gate electrode.

### Claim 15

A semiconductor device comprising:
an isolation structure in a substrate;
a gate structure over an active region of the substrate, wherein the isolation structure surrounds the active region, the gate structure comprising a first section and a second section, and the first section extends parallel to the second section, and the gate structure comprises a gate dielectric layer having a variable thickness;
a conductive field plate over the substrate, the conductive field plate extending between the first section and the second section and overlapping an edge of the active region, wherein a portion of the conductive field plate extends beyond the edge of the active region; and
a first well in the substrate, wherein the first well overlaps the edge of the active region, and the first well extends underneath the isolation structure, and the conductive field plate extends beyond an outer-most edge of the first well.

### Claim 16 (depends on 15)

The semiconductor device of claim 15, wherein a first portion of the gate dielectric layer is closest to the isolation structure, and the first portion of the gate dielectric layer is thicker than a second portion of the gate dielectric layer.

### Claim 17 (depends on 15)

The semiconductor device of claim 15, wherein the conductive field plate comprises a dielectric layer having variable thickness.

### Claim 18 (depends on 17)

The semiconductor device of claim 17, wherein a first portion of the dielectric layer is over the isolation feature, and the first portion is thicker than a second portion of the dielectric layer.

### Claim 19 (depends on 15)

The semiconductor device of claim 15, further comprising a drain region in the substrate.

### Claim 20 (depends on 15)

The semiconductor device of claim 15, wherein a thickness of a thickest portion of the gate dielectric layer ranges from 20 Angstroms to 1,200 Angstroms.