# US 12,119,345 B2 · Semiconductor structure and method for forming the same

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- Number: US 12,119,345 B2
- Document ID: US12119345B2
- Status: Granted
- Kind: B2
- Application number: 17/395,879
- Filed: 2021-08-06
- Published: 2023-02-09
- Granted: 2024-10-15
- Earliest claimed: 2021-08-06
- Assignees: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicants: Taiwan Semiconductor Manufacturing Company Ltd.
- Inventors: Chia-Ho Chu; Yung-Chung Chen; Chih-Tang Peng
- Web page: https://patentgrep.com/patent/US12119345B2

## CPC

- H10D 84/834: {comprising FinFETs}
- H10D 84/0151: {Manufacturing their isolation regions}
- H10D 84/0158: {the components including FinFETs}
- H10D 84/038: {using silicon technology, e.g. SiGe}
- H10P 14/6334: {using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition (deposition by physical ablation of a target H10P14/6329)}
- H10P 14/6532: {by exposure to a plasma}
- H10P 14/665: {Porous materials}
- H10P 14/69215: {the material being a silicon oxide, e.g. SiO2}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10

## Abstract

A semiconductor structure includes a first FinFET device disposed over a substrate, a second FinFET device disposed over the substrate, and an isolation structure. The first FinFET device includes at least a first fin and a first metal gate structure over the first fin. The second FinFET device includes at least a second fin and a second metal gate structure over the second fin. The isolation structure is disposed between the first metal gate structure and the second metal gate structure. The isolation structure includes a dielectric feature and a dielectric layer. The dielectric layer is between the dielectric feature and the first metal gate structure, between the dielectric feature and the second metal gate structure, and between the dielectric feature and the substrate. The dielectric feature and the dielectric layer include different materials and different thicknesses.

## Claims

### Claim 1

A method for forming a semiconductor structure, comprising:
forming a first FinFET device, a second FinFET device and a dielectric structure over a substrate, wherein the dielectric structure surrounds the first FinFET device and the second FinFET device;
forming a first trench in the first FinFET device and the second FinFET device;
forming a metal gate feature in the first trench;
removing a portion of the metal gate feature to form a second trench in the metal gate feature; and
forming an isolation structure in the second trench, wherein the forming of the isolation structure further comprises:
performing a flowable chemical vapor deposition (FCVD) to form a dielectric material in the second trench;
performing a nitrogen-containing treatment to form a dielectric layer after the FCVD; and
performing a UV curing to cure the dielectric material to form a dielectric feature after the nitrogen-containing treatment,
wherein the isolation structure comprises the dielectric layer and the dielectric feature over the dielectric layer, and the dielectric layer and the dielectric feature comprise different dielectric materials.

### Claim 2 (depends on 1)

The method of claim 1, wherein the nitrogen-containing treatment comprises an ammonia (NH3) soaking.

### Claim 3 (depends on 1)

The method of claim 1, wherein the nitrogen-containing treatment comprises a nitrogen-containing gas or a nitrogen-containing plasma treatment.

### Claim 4 (depends on 1)

The method of claim 1, further comprising forming a connecting structure coupled to the first FinFET device or the second FinFET device.

### Claim 5

A method for forming a semiconductor structure, comprising:
forming a first FinFET device and a second FinFET device over a substrate;
forming a metal gate feature coupling the first FinFET device and the second FinFET device;
cutting the metal gate feature to form a trench interrupting the metal gate feature;
performing a flowable chemical vapor deposition (FCVD) to form a dielectric material to fill the trench;
performing a nitrogen-containing treatment to form a dielectric layer under the dielectric material; and
performing a UV curing to convert the dielectric material into a dielectric feature over the dielectric layer.

### Claim 6 (depends on 5)

The method of claim 5, wherein the nitrogen-containing treatment is performed before the UV curing and after the FCVD.

### Claim 7 (depends on 5)

The method of claim 5, wherein the nitrogen-containing treatment comprises an ammonia (NH3) soaking.

### Claim 8 (depends on 5)

The method of claim 5, wherein the nitrogen-containing treatment comprises a nitrogen-containing gas or a nitrogen-containing plasma treatment.

### Claim 9 (depends on 5)

The method of claim 5, wherein the dielectric layer and the dielectric feature comprise different dielectric materials.

### Claim 10 (depends on 5)

The method of claim 5, further comprising forming a dielectric structure surrounding the first FinFET device and the second FinFET device.

### Claim 11 (depends on 10)

The method of claim 10, wherein the trench comprising:
a first sidewall exposing the metal gate feature; and
a second sidewall exposing the dielectric structure.

### Claim 12 (depends on 5)

The method of claim 5, further comprising an isolation structure over the substrate.

### Claim 13 (depends on 12)

The method of claim 12, wherein a bottom of the trench is lower than a top surface of the isolation structure.

### Claim 14 (depends on 12)

The method claim 12, wherein a bottom of the dielectric feature is lower than a top surface of the isolation structure.

### Claim 15 (depends on 5)

The method of claim 5, further comprising forming a connecting structure coupled to the first FinFET device or the second FinFET device.

### Claim 16

A method for forming a semiconductor structure, comprising:
forming a first FinFET device, a second FinFET device and a dielectric structure surrounding the first FinFET device and the second FinFET device;
forming a metal gate feature coupling the first FinFET device and the second FinFET device;
removing a portion of the metal gate feature to form a trench to cut the metal gate feature to form a first metal gate structure in the first FinFET device and a second metal gate structure in the second FinFET device;
performing a nitrogen-containing treatment to form a dielectric layer in the trench;
performing a flowable chemical vapor deposition (FCVD) to form a dielectric material to fill the trench after the nitrogen-containing treatment; and
performing a UV curing to convert the dielectric material into a dielectric feature over the dielectric layer.

### Claim 17 (depends on 16)

The method of claim 16, wherein the nitrogen-containing treatment comprises an ammonia (NH3) soaking.

### Claim 18 (depends on 16)

The method of claim 16, wherein the nitrogen-containing treatment comprises a nitrogen-containing gas or a nitrogen-containing plasma treatment.

### Claim 19 (depends on 16)

The method of claim 16, wherein the trench comprising:
a first sidewall exposing the metal gate feature; and
a second sidewall exposing the dielectric structure.

### Claim 20 (depends on 19)

The method of claim 19, wherein dielectric layer covering the first sidewall and the second sidewall of the trench, a top surface of the metal gate feature, and a top surface of the dielectric structure.