# US 12,119,342 B2 · Resistor and resistor-transistor-logic circuit with GaN structure and method of manufacturing the same

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- Number: US 12,119,342 B2
- Document ID: US12119342B2
- Status: Granted
- Kind: B2
- Application number: 18/119,253
- Filed: 2023-03-08
- Published: 2023-07-13
- Granted: 2024-10-15
- Earliest claimed: 2020-09-21
- Assignees: United Microelectronics Corp.
- Applicants: United Microelectronics Corp.
- Inventors: Kuo-Hsing Lee; Sheng-Yuan Hsueh; Chien-Liang Wu; Te-Wei Yeh; Yi-Chun Chen
- Web page: https://patentgrep.com/patent/US12119342B2

## CPC

- H10D 84/01: Manufacture or treatment
- H10D 1/43: Resistors having PN junctions
- H10D 1/47: Resistors having no potential barriers
- H10D 30/015: {of FETs having heterojunction interface channels or heterojunction gate electrodes, e.g. HEMT}
- H10D 30/475: {having wider bandgap layer formed on top of lower bandgap active layer, e.g. undoped barrier HEMTs such as i-AlGaN/GaN HEMTs}
- H10D 62/117: {Shapes of semiconductor bodies}
- H10D 62/126: {Top-view geometrical layouts of the regions or the junctions}
- H10D 62/343: {Gate regions of field-effect devices having PN junction gates}
- H10D 62/824: comprising only Group III-V materials heterojunctions, e.g. GaN/AlGaN heterojunctions
- H10D 62/8503: {Nitride Group III-V materials, e.g. AlN or GaN}
- H10D 64/111: {Field plates}
- H10D 84/05: using Group III-V technology
- H10D 84/811: {Combinations of field-effect devices and one or more diodes, capacitors or resistors}
- H10D 84/817: {Combinations of field-effect devices and resistors only}
- H10P 50/246: {of Group III-V materials}
- H10W 10/051: {of isolation region based on field-effect}
- H10W 10/50: Isolation regions based on field-effect
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

A resistor with GaN structures, including a GaN layer with a 2DEG resistor region and an undoped polysilicon resistor region, an AlGaN barrier layer on the GaN layer in the 2DEG resistor region, multiple p-type doped GaN capping layers arranged on the AlGaN barrier layer so that the GaN layer not covered by the p-type doped GaN capping layers in the 2DEG resistor region is converted into a 2DEG resistor, a passivation layer on the GaN layer, and an undoped polysilicon layer on the passivation layer in the undoped polysilicon resistor region and functions as an undoped polysilicon resistor.

## Claims

### Claim 1

A resistor with GaN structures, comprising:
a GaN layer with a two-dimensional electron gas (2DEG) resistor region and an undoped polysilicon resistor region;
an AlGaN barrier layer on said GaN layer in said 2DEG resistor region;
multiple p-type doped GaN capping layers arranged in a staggered arrangement on said AlGaN barrier layer and not directly connected with any interconnects or not applied with voltages, so that said GaN layer not covered by said p-type doped GaN capping layers in said 2DEG resistor region forms a winding pattern and is converted into a 2DEG resistor;
a passivation layer on said GaN layer; and
an undoped polysilicon layer on said passivation layer in said undoped polysilicon resistor region and functioning as an undoped polysilicon resistor.

### Claim 2 (depends on 1)

The resistor with GaN structures of claim 1, wherein said GaN layer comprises a lower GaN epitaxial layer and an upper GaN mesa layer, and said AlGaN barrier layer is on said GaN mesa layer.

### Claim 3 (depends on 1)

The resistor with GaN structures of claim 1, wherein said undoped polysilicon layer forms a winding pattern on said passivation layer.

### Claim 4 (depends on 1)

The resistor with GaN structures of claim 1, further comprising a first source and a first drain formed on said 2DEG resistor.

### Claim 5 (depends on 1)

The resistor with GaN structures of claim 1, wherein said GaN layer further comprises a doped polysilicon resistor region, a doped polysilicon layer is formed on said passivation layer in said doped polysilicon resistor region, and said doped polysilicon layer functions as a doped polysilicon resistor.

### Claim 6 (depends on 5)

The resistor with GaN structures of claim 5, wherein said doped polysilicon layer forms a winding pattern on said passivation layer.