# US 12,119,327 B2 · Method for manufacturing stack components > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,119,327 B2 - Document ID: US12119327B2 - Status: Granted - Kind: B2 - Application number: 17/630,870 - Filed: 2019-07-30 - Published: 2022-08-25 - Granted: 2024-10-15 - Earliest claimed: 2019-07-30 - Assignees: Fuji Corporation - Applicants: Fuji Corporation - Inventors: Ryojiro Tominaga - Web page: https://patentgrep.com/patent/US12119327B2 ## CPC - H05K 3/4697: {having cavities, e.g. for mounting components (H05K3/4691 takes precedence)} - H10W 90/00: Package configurations - B33Y 10/00: Processes of additive manufacturing - H05K 1/144: {Stacked arrangements of planar printed circuit boards} - H05K 3/10: in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern - H05K 3/46: Manufacturing multilayer circuits - B33Y 80/00: Products made by additive manufacturing - H05K 3/4694: {Partitioned multilayer circuits having adjacent regions with different properties, e.g. by adding or inserting locally circuit layers having a higher circuit density (H05K3/4691 takes precedence)} - H05K 2201/0311: Metallic part with specific elastic properties, e.g. bent piece of metal as electrical contact - H05K 2201/042: Stacked spaced PCBs; Planar parts of folded flexible circuits having mounted components in between or spaced from each other - H05K 2201/10303: Pin-in-hole mounted pins - H10W 70/614: {the multiple chips being integrally enclosed} - H10W 70/63: Vias, e.g. via plugs - H10W 70/682: {comprising holes having chips therein} - H10W 72/072: {of bump connectors} - H10W 72/241: {Dispositions, e.g. layouts} - H10W 90/701: {characterised by the relative positions of pads or connectors relative to package parts} - H10W 90/724: {between a chip and a stacked insulating package substrate, interposer or RDL} - H05K: PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS - H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10 - B33Y: ADDITIVE MANUFACTURING, i.e. MANUFACTURING OF THREE-DIMENSIONAL [3D] OBJECTS BY ADDITIVE DEPOSITION, ADDITIVE AGGLOMERATION OR ADDITIVE LAYERING, e.g. BY 3D PRINTING, STEREOLITHOGRAPHY OR SELECTIVE LASER SINTERING ## Abstract A method for manufacturing a stack component in which an interposer is interposed to form a space for inserting an interlayer connection pin between circuit layers to be stacked, the method includes a printing step of simultaneously printing and forming the circuit layer and the interposer side by side in a planar manner by a 3D printer, a step of mounting a circuit element on the circuit layer, a step of mounting the interposer on the circuit layer, a step of inserting the interlayer connection pin into the interposer mounted on the circuit layer, and a step of electrically connecting the circuit layer and another circuit layer by the interlayer connection pin by stacking the other circuit layer on the circuit layer via the interposer. ## Claims ### Claim 1 A method for manufacturing a stack component in which a circuit element is mounted on at least one circuit layer of multiple circuit layers to be stacked, the circuit layers are electrically connected by an interlayer connection pin, and an interposer is interposed to form a space for inserting the interlayer connection pin between the circuit layers, the method comprising: a printing step of simultaneously printing and forming the circuit layer and the interposer side by side in a planar manner by a 3D printer; a step of mounting the circuit element on the circuit layer; a step of mounting the interposer on the circuit layer; a step of inserting the interlayer connection pin into the interposer mounted on the circuit layer; and a step of electrically connecting the circuit layer and another circuit layer by the interlayer connection pin by stacking the other circuit layer on the circuit layer via the interposer. ### Claim 2 (depends on 1) The method for manufacturing a stack component according to claim 1, wherein in the printing step, the circuit layers of all layers constituting the stack component and the interposer are simultaneously printed and formed side by side in a planar manner. ### Claim 3 (depends on 1) The method for manufacturing a stack component according to claim 1, wherein some of the circuit layers and/or some of the interposers are formed by another printing step or another forming method. ### Claim 4 (depends on 1) The method for manufacturing a stack component according to claim 1, wherein the interlayer connection pin is configured to be extendable and contractible by a spring. ### Claim 5 (depends on 1) The method for manufacturing a stack component according to claim 1, wherein as the interlayer connection pin, multiple types of interlayer connection pins having different lengths are used. ### Claim 6 (depends on 1) The method for manufacturing a stack component according to claim 1, wherein the circuit element and the interposer are mounted on the same surface of the circuit layer. ### Claim 7 (depends on 1) The method for manufacturing a stack component according to claim 1, wherein the circuit element is mounted on one surface of the circuit layer, and the interposer is mounted on the other surface. ### Claim 8 (depends on 1) The method for manufacturing a stack component according to claim 1, further comprising: a step of mounting a circuit element on an upper surface of an uppermost circuit layer and/or on a lower surface of a lowermost circuit layer of the stack component. ### Claim 9 (depends on 1) The method for manufacturing a stack component according to claim 1, further comprising: a step of manufacturing a small-sized stack component in which the circuit layers of all layers constituting the small-sized stack component and the interposer are simultaneously printed and formed side by side in a planar manner; a step of mounting the small-sized stack component and the interposer on an upper surface of a circuit layer; and a step of electrically connecting the circuit layer and another circuit layer by an interlayer connection pin by stacking the other circuit layer on the circuit layer via the small-sized stack component and the interposer. ### Claim 10 (depends on 1) The method for manufacturing a stack component according to claim 1, further comprising: a step of mounting the circuit element on a lower surface of the other circuit layer before stacking the other circuit layer above the circuit layer.