# US 12,119,322 B2 · Bonding member for semiconductor device

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- Number: US 12,119,322 B2
- Document ID: US12119322B2
- Status: Granted
- Kind: B2
- Application number: 18/014,272
- Filed: 2021-06-28
- Published: 2023-12-07
- Granted: 2024-10-15
- Earliest claimed: 2020-09-18
- Assignees: Superufo291 Tec
- Applicants: Superufo291 Tec
- Inventors: Akira Fukui; Toshie Fukui
- Web page: https://patentgrep.com/patent/US12119322B2

## CPC

- B23K 35/3006: {Ag as the principal constituent}
- H10W 42/121: {protecting against mechanical damage (H10W76/00, H10W74/00 take precedence)}
- B23K 35/0233: {Sheets or foils (B23K35/0244 takes precedence)}
- H10W 72/00: Interconnections or connectors in packages
- H10W 72/073: {of die-attach connectors}
- B23K 2101/40: Semiconductor devices
- H10W 40/10: Arrangements for heating
- H10W 72/07351: {characterised by changes in properties of the die-attach connectors during connecting}
- H10W 72/30: Die-attach connectors
- H10W 72/322: {Multilayered die-attach connectors, e.g. a coating on a top surface of a core}
- H10W 72/352: {comprising metals or metalloids, e.g. solders}
- H10W 72/381: {Auxiliary members}
- H10W 72/90: Bond pads, in general
- H10W 72/923: {Bond pads having multiple stacked layers}
- H10W 72/952: {comprising metals or metalloids, e.g. PbSn, Ag or Cu}
- H10W 90/736: {between a chip and a stacked lead frame, conducting package substrate or heat sink}
- B23K: SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

A bonding member 10 used for bonding a semiconductor device 20 and a substrate 30, the bonding member including: a thermal stress relieving layer 11 made of any of Ag, Cu, Au, and Al; a first Ag brazing material layer 12 containing Ag and Sn as main components and provided on a side of the thermal stress relieving layer to which the semiconductor device is bonded; a second Ag brazing material layer 13 containing Ag and Sn as main components and provided on a side of the thermal stress relieving layer to which the substrate is bonded; a first barrier layer 14 made of Ni and/or Ni alloy and provided between the thermal stress relieving layer and the first Ag brazing material layer; and a second barrier layer 15 made of Ni and/or Ni alloy and provided between the stress relieving layer and the second Ag brazing material layer, in which a thermal conductivity of the bonding member after a power cycle test is 200 W/m·K or more.

## Claims

### Claim 1

A semiconductor device bonding member used for bonding a semiconductor device and a substrate, the bonding member comprising:
a thermal stress relieving layer made of any of Ag, Cu, Au, and Al;
a first Ag brazing material layer containing Ag and Sn as main components and provided on a side of the thermal stress relieving layer to which the semiconductor device is bonded;
a second Ag brazing material layer containing Ag and Sn as main components and provided on a side of the thermal stress relieving layer to which the substrate is bonded;
a first barrier layer made of Ni and/or Ni alloy and provided between the stress relieving layer and the first Ag brazing material layer; and
a second barrier layer made of Ni and/or Ni alloy and provided between the stress relieving layer and the second Ag brazing material layer,
wherein a thermal conductivity is 200 W/m·K or more after a power cycle test in which heating to 300° C. by current supply and cooling to 25° C. are repeated 30,000 times.

### Claim 2 (depends on 1)

The semiconductor device bonding member according to claim 1, wherein the thermal stress relieving layer is made of Ag.

### Claim 3 (depends on 1)

The semiconductor device bonding member according to claim 1, wherein a porosity of the first Ag brazing material layer and the second Ag brazing material layer is 5 vol % or less, and a total thickness of the first Ag brazing material layer and the second Ag brazing material layer is 10% or less of a thickness of the entire bonding member.

### Claim 4 (depends on 1)

The semiconductor device bonding member according to claim 1, wherein the thermal stress relieving layer has a porosity of 40 vol % or less.

### Claim 5 (depends on 1)

The semiconductor device bonding member according to claim 1, wherein an overall thickness is 10 μm or more and 300 μm or less.

### Claim 6 (depends on 1)

A semiconductor module comprising the semiconductor device bonding member according to claim 1.