# US 12,119,321 B2 · Semiconductor device and a method of manufacturing thereof > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,119,321 B2 - Document ID: US12119321B2 - Status: Granted - Kind: B2 - Application number: 17/947,536 - Filed: 2022-09-19 - Published: 2023-01-19 - Granted: 2024-10-15 - Earliest claimed: 2016-03-15 - Assignees: Epistar Corporation - Applicants: Epistar Corporation - Inventors: Shih-An Liao; Shau-Yi Chen; Ming-Chi Hsu; Chun-Hung Liu; Min-Hsun Hsieh - Web page: https://patentgrep.com/patent/US12119321B2 ## CPC - H10H 20/857: Interconnections, e.g. lead-frames, bond wires or solder balls - H10H 20/824: comprising only Group III-V materials, e.g. GaP - H10H 20/8585: {being an interconnection} - H10W 70/60: Insulating or insulated package substrates; Interposers; Redistribution layers (leadframes H10W70/40) - H10W 70/682: {comprising holes having chips therein} - H10W 72/07253: {changes in shapes} - H10W 72/07254: {changes in dispositions} - H10W 72/07255: {changes in materials} - H10W 72/073: {of die-attach connectors} - H10W 72/07323: {Active alignment, e.g. using optical alignment using marks or sensors} - H10W 72/07331: {Connecting techniques} - H10W 72/07332: {Compression bonding, e.g. thermocompression bonding} - H10W 72/07338: {hardening the adhesive by curing, e.g. thermosetting} - H10W 72/07339: {hardening the adhesive by cooling, e.g. thermoplastics} - H10W 72/074: {of anisotropic conductive adhesives} - H10W 72/225: {Bumps having a filler embedded in a matrix} - H10W 72/234: {Cross-sectional shape, i.e. in side view} - H10W 72/244: {relative to underlying supporting features, e.g. bond pads, RDLs or vias} - H10W 72/251: {Materials} - H10W 72/252: {comprising solid metals or solid metalloids, e.g. PbSn, Ag or Cu} - H10W 72/325: {Die-attach connectors having a filler embedded in a matrix} - H10W 72/351: {Materials of die-attach connectors} - H10W 72/352: {comprising metals or metalloids, e.g. solders} - H10W 72/354: {comprising polymers} - H10W 72/551: {Materials of bond wires} - H10W 72/9413: {on encapsulations} - H10W 72/9445: {Top-view layouts, e.g. mirror arrays} - H10W 74/15: on active surfaces of flip-chip devices, e.g. underfills - H10W 90/724: {between a chip and a stacked insulating package substrate, interposer or RDL} - H10W 90/734: {between a chip and a stacked insulating package substrate, interposer or RDL} - H10W 90/754: {between a chip and a stacked insulating package substrate, interposer or RDL} - H10H: INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS - H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10 ## Abstract A semiconductor device comprises a semiconductor die, comprising a stacking structure, a first bonding pad with a first bonding surface positioned away from the stack structure, and a second bonding pad; a carrier comprising a connecting surface; a third bonding pad which comprises a second bonding surface and is arranged on the connecting surface, and a fourth bonding pad arranged on the connecting surface of the carrier; and a conductive connecting layer comprising a first conductive part, comprising a first outer contour, and formed between and directly contacting the first bonding pad and the third bonding pad; a second conductive part formed between the second bonding pad and the fourth bonding pad; and a blocking part covering the first conductive part to form a covering area, wherein the first bonding surface comprises a first position which is the closest to the carrier within the covering area and a second position which is the farthest from the carrier within the covering area in a cross section view, and a distance from the first position to the first out contour is greater than that from the second position to the first outer contour. ## Claims ### Claim 1 A method of manufacturing a semiconductor device, comprising: preparing a first semiconductor die and a first conductive agent, wherein the first semiconductor die comprises a stacking structure, a first bonding pad, and a second bonding pad, the first conductive agent comprises a first sub agent and a second sub agent which are separated from each other without being connected by any other sub agent, and connected to the first bonding pad and the second bonding pad, respectively; preparing a carrier devoid of the first conductive agent, and comprising a third bonding pad, and a fourth bonding pad; aligning the first bonding pad connected to the first sub agent and the second bonding pad connected to the second sub agent to the third bonding pad and the fourth bonding pad, respectively; and curing the first conductive agent to form a first conductive connecting layer between the first semiconductor die and the carrier. ### Claim 2 (depends on 1) The method of claim 1, wherein the first bonding pad and the second bonding pad are separated by a shortest distance not more than 150 μm. ### Claim 3 (depends on 1) The method of claim 1, wherein the first conductive connecting layer comprises a current conductive area and a current blocking area. ### Claim 4 (depends on 3) The method of claim 3, wherein the current blocking area is located outside of the current conductive area. ### Claim 5 (depends on 3) The method of claim 3, wherein the current conductive area comprises a first part located between the first bonding pad and third bonding pad, and a second part located between the second bonding pad and the fourth bonding pad. ### Claim 6 (depends on 3) The method of claim 3, wherein, the current blocking area comprises a conductive material dispersed therein without forming a continuous current conductive path between the first bonding pad and the third bonding pad. ### Claim 7 (depends on 1) The method of claim 1, wherein the first conductive agent is provided by utilizing a printing plate with openings. ### Claim 8 (depends on 1) The method of claim 1, wherein, in a step of curing the first conductive agent, the first conductive agent is heated, cooled, or added a material which can initiate a curing effect. ### Claim 9 (depends on 1) The method of claim 1, wherein, in a step of curing the first conductive agent, the first conductive agent is heated and pressurized at the same time. ### Claim 10 (depends on 1) The method of claim 1, further comprising: preparing a second semiconductor die; and providing a second conductive agent on the second semiconductor die; wherein the first conductive agent and the second conductive agent are separated from each other. ### Claim 11 (depends on 10) The method of claim 10, further comprising: placing the second semiconductor die with the second conductive agent on the carrier; and curing the second conductive agent to form a second conductive connecting layer between the second semiconductor die and the carrier. ### Claim 12 (depends on 11) The method of claim 11, wherein the first semiconductor die and the second semiconductor die are separated from each other by a gap which is not covered by the first conductive connecting layer and the second conductive connecting layer. ### Claim 13 (depends on 10) The method of claim 10, wherein the second semiconductor die comprises a fifth bonding pad and a sixth bonding pad, the carrier comprises a seventh bonding pad and an eighth bonding pad. ### Claim 14 (depends on 13) The method of claim 13, further comprising: aligning the fifth bonding pad and the sixth bonding pad to the seventh bonding pad and the eighth bonding pad, respectively; and curing the second conductive agent to form a second conductive connecting layer between the second semiconductor die and the carrier.