# US 12,119,314 B2 · Semiconductor device and method for manufacturing semiconductor device

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- Number: US 12,119,314 B2
- Document ID: US12119314B2
- Status: Granted
- Kind: B2
- Application number: 17/283,936
- Filed: 2019-02-28
- Published: 2021-12-23
- Granted: 2024-10-15
- Earliest claimed: 2019-02-28
- Assignees: Mitsubishi Electric Corporation
- Applicants: Mitsubishi Electric Corporation
- Inventors: Nobuyoshi Kimoto; Tadatsugu Yamamoto
- Web page: https://patentgrep.com/patent/US12119314B2

## CPC

- H10W 72/90: Bond pads, in general
- H10W 74/137: {the encapsulations being directly on the semiconductor body (H10W74/134 takes precedence)}
- H10W 72/019: {of bond pads}
- H10W 72/01935: {by plating, e.g. electroless plating or electroplating}
- H10W 72/01938: {in gaseous form, e.g. by CVD or PVD}
- H10W 72/073: {of die-attach connectors}
- H10W 72/07353: {changes in shapes}
- H10W 72/07354: {changes in dispositions}
- H10W 72/334: {Cross-sectional shape, i.e. in side view}
- H10W 72/347: {Dispositions of multiple die-attach connectors}
- H10W 72/352: {comprising metals or metalloids, e.g. solders}
- H10W 72/387: {Flow barriers}
- H10W 72/59: Bond pads specially adapted therefor
- H10W 72/923: {Bond pads having multiple stacked layers}
- H10W 72/934: {Cross-sectional shape, i.e. in side view}
- H10W 72/9415: {relative to the surface, e.g. recessed, protruding}
- H10W 72/942: {relative to underlying supporting features, e.g. bond pads, RDLs or vias}
- H10W 72/944: {Dispositions of multiple bond pads}
- H10W 72/952: {comprising metals or metalloids, e.g. PbSn, Ag or Cu}
- H10W 72/987: {Flow barriers}
- H10W 74/00: Encapsulations, e.g. protective coatings
- H10W 90/736: {between a chip and a stacked lead frame, conducting package substrate or heat sink}
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

A semiconductor device according to the present disclosure includes a semiconductor substrate, a first electrode provided on the semiconductor substrate, an insulating layer including a first part provided on an upper surface of the first electrode, a second electrode including a main portion and an eaves portion, the main portion being provided on the upper surface of the first electrode, the eaves portion extending over the first part and solder covering an upper surface of the main portion and a part of an upper surface of the eaves portion wherein the insulating layer includes a second part covering a part of the upper surface of the eaves portion, the part being closer to an end portion of the eaves portion than the part covered by the solder and a third part connecting the first part and the second part and covering the end portion of the eaves portion.

## Claims

### Claim 1

A semiconductor device, comprising:
a semiconductor substrate;
a first electrode provided on the semiconductor substrate;
an insulating layer including a first part provided on an upper surface of the first electrode;
a second electrode including a main portion and an eaves portion, the main portion being provided on the upper surface of the first electrode, the eaves portion being connected to the main portion and extending over the first part; and
solder covering and directly contacting an upper surface of the main portion and a part of an uppermost surface of the eaves portion connected with the upper surface of the main portion of the second electrode;
wherein
the insulating layer includes:
a second part covering a part of the uppermost surface of the eaves portion, the part being closer to an end of the eaves portion than the part covered by the solder; and
a third part connecting the first part and the second part and covering the end of the eaves portion, and
a length of the second part from the end of the eaves to an end of the second part is shorter than a length of the first part from the end of the eaves portion to an end of the first part.

### Claim 2

A semiconductor device, comprising:
a semiconductor substrate;
a first electrode provided on the semiconductor substrate;
an insulating layer provided on an upper surface of the first electrode;
a second electrode including a main portion and an eaves portion, the main portion being provided on the upper surface of the first electrode, the eaves portion being connected to the main portion and extending over the insulating layer;
solder covering an upper surface of the main portion and a part of an upper surface of the eaves portion connected with the upper surface of the main portion of the second electrode; and
a conductive film covering a part of the upper surface of the eaves portion, the part being closer to an end portion of the eaves portion than the part covered by the solder, the conductive film on which it is harder for the solder to wet and spread than on the second electrode.

### Claim 3 (depends on 2)

The semiconductor device according to claim 2, wherein an end portion of the conductive film on a side of the main portion is provided closer to the end portion of the eaves portion than an end portion of the insulating layer, the end portion of the insulating layer facing the main portion.

### Claim 4 (depends on 2)

The semiconductor device according to claim 2, wherein the conductive film is made with Al.

### Claim 5 (depends on 1)

The semiconductor device according to claim 1, wherein the second electrode is made with Ni.

### Claim 6 (depends on 1)

The semiconductor device according to claim 1, wherein the second electrode includes a Ti film provided on the upper surface of the first electrode and an Ni film provided on an upper surface of the Ti film.

### Claim 7 (depends on 1)

The semiconductor device according to claim 1, wherein the second electrode includes a first Ni film provided on the upper surface of the first electrode, a Ti film provided on an upper surface of the first Ni film, and a second Ni film provided on an upper surface of the Ti film.

### Claim 8 (depends on 1)

The semiconductor device according to claim 1, wherein the first electrode is made with Al.

### Claim 9 (depends on 1)

The semiconductor device according to claim 1, wherein the semiconductor substrate is made with a wide band gap semiconductor.

### Claim 10 (depends on 9)

The semiconductor device according to claim 9, wherein the wide band gap semiconductor is silicon carbide, a gallium nitride-based material, or diamond.

### Claim 11 (depends on 2)

The semiconductor device according to claim 2, wherein the second electrode is made with Ni.

### Claim 12 (depends on 2)

The semiconductor device according to claim 2, wherein the second electrode includes a Ti film provided on the upper surface of the first electrode and an Ni film provided on an upper surface of the Ti film.

### Claim 13 (depends on 2)

The semiconductor device according to claim 2, wherein the second electrode includes a first Ni film provided on the upper surface of the first electrode, a Ti film provided on an upper surface of the first Ni film, and a second Ni film provided on an upper surface of the Ti film.

### Claim 14 (depends on 2)

The semiconductor device according to claim 2, wherein the first electrode is made with Al.

### Claim 15 (depends on 2)

The semiconductor device according to claim 2, wherein the semiconductor substrate is made with a wide band gap semiconductor.

### Claim 16 (depends on 15)

The semiconductor device according to claim 15, wherein the wide band gap semiconductor is silicon carbide, a gallium nitride-based material, or diamond.