# US 12,119,299 B2 · Semiconductor device and manufacturing method for the same

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- Number: US 12,119,299 B2
- Document ID: US12119299B2
- Status: Granted
- Kind: B2
- Application number: 17/182,447
- Filed: 2021-02-23
- Published: 2021-10-21
- Granted: 2024-10-15
- Earliest claimed: 2020-04-17
- Assignees: Fuji Electric Co., Ltd.
- Applicants: Fuji Electric Co., Ltd.
- Inventors: Sho Nakagawa
- Web page: https://patentgrep.com/patent/US12119299B2

## CPC

- H10W 20/493: {Fuses, i.e. interconnections changeable from conductive to non-conductive}
- H10D 8/25: Zener diodes
- H10P 74/207: {Electrical properties, e.g. testing or measuring of resistance, deep levels or capacitance-voltage characteristics}
- H10P 74/273: {Interconnections for measuring or testing, e.g. probe pads}
- H10P 74/277: {Circuits for electrically characterising or monitoring manufacturing processes, e.g. circuits in tested chips or circuits in testing wafers}
- H10W 20/0698: {Local interconnections}
- H10W 20/42: Vias, e.g. via plugs
- H03K 17/74: by the use, as active elements, of diodes (by the use of more than one type of semiconductor device H03K17/567; by the use of tunnel diodes H03K17/58; by the use of negative resistance diodes H03K17/70)
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H03K: PULSE TECHNIQUE (measuring pulse characteristics G01R; modulating sinusoidal oscillations with pulses H03C; transmission of digital information H04L; discriminator circuits detecting phase difference between two signals by counting or integrating cycles of oscillation H03D3/04; automatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses where the type of generator is irrelevant or unspecified H03L; coding, decoding or code conversion, in general H03M)

## Abstract

A method for manufacturing a semiconductor device includes: forming a trimming element inside or over a semiconductor substrate; forming an insulating film on the trimming element; forming, on the insulating film, a first wiring layer connected to one end of the trimming element via a first contact region penetrating the insulating film; forming, on the insulating film, a second wiring layer connected to another end of the trimming element via a second contact region penetrating the insulating film; trimming the trimming element; and examining an insulated state between the semiconductor substrate and either the first wiring layer or the second wiring layer after the trimming.

## Claims

### Claim 1

A semiconductor device comprising:
a trimming element buried in or provided over a semiconductor substrate;
an insulating film provided on the trimming element;
a first wiring layer provided on the insulating film and connected to one end of the trimming element via a first contact region penetrating the insulating film;
a second wiring layer provided on the insulating film and connected to another end of the trimming element via a second contact region penetrating the insulating film; and
an auxiliary wiring layer provided at a position separated from the first wiring layer and the second wiring layer, the auxiliary wiring layer for examination of an insulated state of the insulating film between the auxiliary wiring layer and the trimming element to determine whether current flows between the second wiring layer and the auxiliary wiring layer when voltage is applied between the second wiring layer and the auxiliary wiring layer,
wherein
the insulated state between the auxiliary wiring layer and either the first wiring layer or the second wiring layer is examined after trimming of the trimming element,
the trimming element is a fusible resistor provided over the semiconductor substrate via an insulating film, and
the middle part has a narrower width than the one end and the other end in a second direction orthogonal to the first direction.

### Claim 2 (depends on 1)

The semiconductor device of claim 1, wherein the auxiliary wiring layer is insulated from the first wiring layer and the second wiring layer.

### Claim 3 (depends on 1)

The semiconductor device of claim 1, further comprising:
an internal circuit on the semiconductor substrate, the internal circuit comprising a vertical transistor including an insulated gate bipolar transistor (IGBT); and
a trimming circuit connected to the internal circuit on the semiconductor substrate,
wherein the trimming circuit comprises the trimming element, the insulating film, the first wiring layer, the second wiring layer and the auxiliary wiring layer.

### Claim 4 (depends on 1)

The semiconductor device of claim 1, wherein the auxiliary wiring layer is made of metal.

### Claim 5

A semiconductor device comprising:
a trimming element buried in or provided over a semiconductor substrate;
an insulating film provided on the trimming element;
a first wiring layer provided on the insulating film and connected to one end of the trimming element via a first contact region penetrating the insulating film;
a second wiring layer provided on the insulating film and connected to another end of the trimming element via a second contact region penetrating the insulating film; and
an auxiliary wiring layer provided on the insulating film, at a position overlapping with a middle part provided between the one end and the other end of the trimming element in a first direction and separated from the first wiring layer and the second wiring layer, and connected to only one electrode pad, the auxiliary wiring layer for examination of an insulated state of the insulating film between the auxiliary wiring layer and the trimming element to determine whether current flows between the second wiring layer and the auxiliary wiring layer when voltage is applied between the second wiring layer and the auxiliary wiring layer,
wherein
the insulated state between the auxiliary wiring layer and either the first wiring layer or the second wiring layer is examined after trimming of the trimming element,
the trimming element is a fusible resistor provided over the semiconductor substrate via an insulating film, and the middle part has a narrower width than the one end and the other end in a second direction orthogonal to the first direction.

### Claim 6

A semiconductor device comprising:
a trimming element buried in or provided over a semiconductor substrate;
an insulating film provided on the trimming element;
a first wiring layer provided on the insulating film and connected to one end of the trimming element via a first contact region penetrating the insulating film;
a second wiring layer provided on the insulating film and connected to another end of the trimming element via a second contact region penetrating the insulating film; and
an auxiliary wiring layer provided on the insulating film at a position overlapping with a middle part of the trimming element,
wherein the middle part is provided between the one end and the other end in a first direction,
the first wiring layer, second wiring layer and the auxiliary wiring layer are in contact with a top surface of the insulating film,
a thickness of the insulating film between the trimming element and each of the first wiring layer and the second wiring later is equal to a thickness of the insulating film between the auxiliary wiring layer and the trimming element, and
the auxiliary wiring layer for examination of an insulated state of the insulating film between the auxiliary wiring layer and the trimming element to determine whether current flows between the second wiring layer and the auxiliary wiring layer when voltage is applied between the second wiring layer and the auxiliary wiring layer,
wherein
the insulated state between the auxiliary wiring layer and either the first wiring layer or the second wiring layer is examined after trimming of the trimming element,
the trimming element is a fusible resistor provided over the semiconductor substrate via an insulating film, and
the middle part has a narrower width than the one end and the other end in a second direction orthogonal to the first direction.